forked from M-Labs/artiq
spi2: use new rtio_output() API
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d18546550e
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e8d58b35b4
@ -7,7 +7,7 @@ Output event replacement is not supported and issuing commands at the same
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time is an error.
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time is an error.
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"""
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"""
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from artiq.language.core import syscall, kernel, portable, now_mu, delay_mu
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from artiq.language.core import syscall, kernel, portable, delay_mu
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from artiq.language.types import TInt32, TNone
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from artiq.language.types import TInt32, TNone
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from artiq.coredevice.rtio import rtio_output, rtio_input_data
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from artiq.coredevice.rtio import rtio_output, rtio_input_data
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@ -166,7 +166,7 @@ class SPIMaster:
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raise ValueError("Invalid SPI transfer length")
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raise ValueError("Invalid SPI transfer length")
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if div > 257 or div < 2:
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if div > 257 or div < 2:
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raise ValueError("Invalid SPI clock divider")
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raise ValueError("Invalid SPI clock divider")
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rtio_output(now_mu(), self.channel, SPI_CONFIG_ADDR, flags |
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rtio_output((self.channel << 8) | SPI_CONFIG_ADDR, flags |
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((length - 1) << 8) | ((div - 2) << 16) | (cs << 24))
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((length - 1) << 8) | ((div - 2) << 16) | (cs << 24))
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self.update_xfer_duration_mu(div, length)
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self.update_xfer_duration_mu(div, length)
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delay_mu(self.ref_period_mu)
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delay_mu(self.ref_period_mu)
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@ -216,7 +216,7 @@ class SPIMaster:
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:param data: SPI output data to be written.
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:param data: SPI output data to be written.
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"""
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"""
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rtio_output(now_mu(), self.channel, SPI_DATA_ADDR, data)
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rtio_output((self.channel << 8) | SPI_DATA_ADDR, data)
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delay_mu(self.xfer_duration_mu)
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delay_mu(self.xfer_duration_mu)
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@kernel
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@kernel
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