forked from M-Labs/artiq
examples: add SAWG sines (DAC synchronization test)
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artiq/examples/sayma_standalone/repository/sines.py
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22
artiq/examples/sayma_standalone/repository/sines.py
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from artiq.experiment import *
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class SAWGTest(EnvExperiment):
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def build(self):
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self.setattr_device("core")
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self.setattr_device("ttl_sma_out")
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self.sawgs = [self.get_device("sawg"+str(i)) for i in range(8)]
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@kernel
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def run(self):
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self.core.reset()
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for sawg in self.sawgs:
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delay(1*ms)
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sawg.amplitude1.set(.4)
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# Do not use a sub-multiple of oscilloscope sample rates.
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sawg.frequency0.set(49*MHz)
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while True:
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delay(0.5*ms)
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self.ttl_sma_out.pulse(0.5*ms)
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