forked from M-Labs/artiq
sayma_rtm: set clock mux pins
This commit is contained in:
parent
9194402ea5
commit
d609c67cbd
|
@ -81,6 +81,13 @@ class SaymaRTM(Module):
|
||||||
self.submodules.rtm_identifier = RTMIdentifier()
|
self.submodules.rtm_identifier = RTMIdentifier()
|
||||||
csr_devices.append("rtm_identifier")
|
csr_devices.append("rtm_identifier")
|
||||||
|
|
||||||
|
# clock mux: 125MHz ext SMA clock to HMC830 input
|
||||||
|
self.comb += [
|
||||||
|
platform.request("clk_src_ext_sel").eq(1), # use ext clk from sma
|
||||||
|
platform.request("ref_clk_src_sel").eq(1),
|
||||||
|
platform.request("dac_clk_src_sel").eq(0), # use clk from dac_clk
|
||||||
|
]
|
||||||
|
|
||||||
self.submodules.converter_spi = spi.SPIMaster(platform.request("hmc_spi"))
|
self.submodules.converter_spi = spi.SPIMaster(platform.request("hmc_spi"))
|
||||||
csr_devices.append("converter_spi")
|
csr_devices.append("converter_spi")
|
||||||
self.comb += platform.request("hmc7043_reset").eq(0)
|
self.comb += platform.request("hmc7043_reset").eq(0)
|
||||||
|
|
Loading…
Reference in New Issue