forked from M-Labs/artiq
drtio-proto: merge coremgmt ACK adn NACK
This commit is contained in:
parent
18e18bdb46
commit
cd6e5ff378
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@ -141,8 +141,7 @@ pub enum Packet {
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CoreMgmtAllocatorDebugRequest { destination: u8 },
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CoreMgmtAllocatorDebugRequest { destination: u8 },
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CoreMgmtGetLogReply { last: bool, length: u16, data: [u8; SAT_PAYLOAD_MAX_SIZE] },
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CoreMgmtGetLogReply { last: bool, length: u16, data: [u8; SAT_PAYLOAD_MAX_SIZE] },
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CoreMgmtConfigReadReply { last: bool, length: u16, value: [u8; SAT_PAYLOAD_MAX_SIZE] },
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CoreMgmtConfigReadReply { last: bool, length: u16, value: [u8; SAT_PAYLOAD_MAX_SIZE] },
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CoreMgmtAck,
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CoreMgmtReply { succeeded: bool },
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CoreMgmtNack,
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}
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}
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impl Packet {
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impl Packet {
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@ -501,8 +500,9 @@ impl Packet {
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value: value,
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value: value,
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}
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}
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},
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},
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0xdd => Packet::CoreMgmtAck,
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0xdd => Packet::CoreMgmtReply {
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0xde => Packet::CoreMgmtNack,
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succeeded: reader.read_bool()?,
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},
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ty => return Err(Error::UnknownPacket(ty))
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ty => return Err(Error::UnknownPacket(ty))
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})
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})
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@ -869,8 +869,10 @@ impl Packet {
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writer.write_u16(length)?;
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writer.write_u16(length)?;
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writer.write_all(&value[0..length as usize])?;
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writer.write_all(&value[0..length as usize])?;
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},
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},
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Packet::CoreMgmtAck => writer.write_u8(0xdd)?,
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Packet::CoreMgmtReply { succeeded } => {
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Packet::CoreMgmtNack => writer.write_u8(0xde)?,
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writer.write_u8(0xdd)?;
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writer.write_bool(succeeded)?;
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},
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}
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}
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Ok(())
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Ok(())
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}
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}
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@ -197,7 +197,7 @@ mod remote_coremgmt {
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);
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);
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match reply {
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match reply {
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Ok(Packet::CoreMgmtAck) => {
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Ok(Packet::CoreMgmtReply { succeeded: true }) => {
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Reply::Success.write_to(stream)?;
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Reply::Success.write_to(stream)?;
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Ok(())
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Ok(())
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}
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}
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@ -248,7 +248,7 @@ mod remote_coremgmt {
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);
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);
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match reply {
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match reply {
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Ok(Packet::CoreMgmtAck) => {
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Ok(Packet::CoreMgmtReply { succeeded: true }) => {
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Reply::Success.write_to(stream)?;
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Reply::Success.write_to(stream)?;
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Ok(())
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Ok(())
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}
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}
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@ -274,7 +274,7 @@ mod remote_coremgmt {
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);
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);
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match reply {
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match reply {
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Ok(Packet::CoreMgmtAck) => {
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Ok(Packet::CoreMgmtReply { succeeded: true }) => {
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Reply::Success.write_to(stream)?;
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Reply::Success.write_to(stream)?;
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Ok(())
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Ok(())
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}
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}
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@ -351,7 +351,7 @@ mod remote_coremgmt {
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&Packet::CoreMgmtConfigWriteRequest {
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&Packet::CoreMgmtConfigWriteRequest {
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destination: destination, length: len as u16, last: status.is_last(), data: *slice});
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destination: destination, length: len as u16, last: status.is_last(), data: *slice});
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match reply {
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match reply {
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Ok(Packet::CoreMgmtAck) => Ok(()),
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Ok(Packet::CoreMgmtReply { succeeded: true }) => Ok(()),
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Ok(packet) => {
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Ok(packet) => {
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error!("received unexpected aux packet: {:?}", packet);
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error!("received unexpected aux packet: {:?}", packet);
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Err(drtio::Error::UnexpectedReply)
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Err(drtio::Error::UnexpectedReply)
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@ -389,7 +389,7 @@ mod remote_coremgmt {
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});
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});
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match reply {
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match reply {
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Ok(Packet::CoreMgmtAck) => {
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Ok(Packet::CoreMgmtReply { succeeded: true }) => {
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Reply::Success.write_to(stream)?;
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Reply::Success.write_to(stream)?;
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Ok(())
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Ok(())
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}
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}
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@ -416,7 +416,7 @@ mod remote_coremgmt {
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});
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});
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match reply {
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match reply {
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Ok(Packet::CoreMgmtAck) => {
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Ok(Packet::CoreMgmtReply { succeeded: true }) => {
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Reply::Success.write_to(stream)?;
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Reply::Success.write_to(stream)?;
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Ok(())
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Ok(())
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}
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}
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@ -443,7 +443,7 @@ mod remote_coremgmt {
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});
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});
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match reply {
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match reply {
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Ok(Packet::CoreMgmtAck) => {
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Ok(Packet::CoreMgmtReply { succeeded: true }) => {
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Reply::RebootImminent.write_to(stream)?;
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Reply::RebootImminent.write_to(stream)?;
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Ok(())
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Ok(())
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}
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}
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@ -470,7 +470,7 @@ mod remote_coremgmt {
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});
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});
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match reply {
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match reply {
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Ok(Packet::CoreMgmtAck) => Ok(()),
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Ok(Packet::CoreMgmtReply { succeeded: true }) => Ok(()),
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Ok(packet) => {
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Ok(packet) => {
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error!("received unexpected aux packet: {:?}", packet);
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error!("received unexpected aux packet: {:?}", packet);
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Err(drtio::Error::UnexpectedReply.into())
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Err(drtio::Error::UnexpectedReply.into())
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@ -498,13 +498,13 @@ fn process_aux_packet(dmamgr: &mut DmaManager, analyzer: &mut Analyzer, kernelmg
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forward!(router, _routing_table, _destination, *rank, *self_destination, _repeaters, &packet);
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forward!(router, _routing_table, _destination, *rank, *self_destination, _repeaters, &packet);
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error!("RISC-V satellite devices do not support buffered logging");
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error!("RISC-V satellite devices do not support buffered logging");
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
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}
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}
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drtioaux::Packet::CoreMgmtSetUartLogLevelRequest { destination: _destination, .. } => {
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drtioaux::Packet::CoreMgmtSetUartLogLevelRequest { destination: _destination, .. } => {
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forward!(router, _routing_table, _destination, *rank, *self_destination, _repeaters, &packet);
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forward!(router, _routing_table, _destination, *rank, *self_destination, _repeaters, &packet);
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error!("RISC-V satellite devices has fixed UART log level fixed at TRACE");
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error!("RISC-V satellite devices has fixed UART log level fixed at TRACE");
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
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}
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}
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drtioaux::Packet::CoreMgmtConfigReadRequest {
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drtioaux::Packet::CoreMgmtConfigReadRequest {
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destination: _destination,
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destination: _destination,
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@ -518,7 +518,7 @@ fn process_aux_packet(dmamgr: &mut DmaManager, analyzer: &mut Analyzer, kernelmg
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let key_slice = &key[..length as usize];
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let key_slice = &key[..length as usize];
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if !key_slice.is_ascii() {
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if !key_slice.is_ascii() {
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error!("invalid key");
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error!("invalid key");
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
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} else {
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} else {
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let key = core::str::from_utf8(key_slice).unwrap();
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let key = core::str::from_utf8(key_slice).unwrap();
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if coremgr.fetch_config_value(key).is_ok() {
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if coremgr.fetch_config_value(key).is_ok() {
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@ -532,7 +532,7 @@ fn process_aux_packet(dmamgr: &mut DmaManager, analyzer: &mut Analyzer, kernelmg
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},
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},
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)
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)
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} else {
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
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}
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}
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}
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}
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}
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}
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@ -559,7 +559,7 @@ fn process_aux_packet(dmamgr: &mut DmaManager, analyzer: &mut Analyzer, kernelmg
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if last {
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if last {
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coremgr.write_config()
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coremgr.write_config()
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} else {
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })
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}
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}
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}
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}
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drtioaux::Packet::CoreMgmtConfigRemoveRequest { destination: _destination, length, key } => {
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drtioaux::Packet::CoreMgmtConfigRemoveRequest { destination: _destination, length, key } => {
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@ -570,16 +570,12 @@ fn process_aux_packet(dmamgr: &mut DmaManager, analyzer: &mut Analyzer, kernelmg
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.map_err(|err| warn!("error on removing config: {:?}", err))
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.map_err(|err| warn!("error on removing config: {:?}", err))
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.is_ok();
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.is_ok();
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if succeeded {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded })
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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}
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}
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drtioaux::Packet::CoreMgmtRebootRequest { destination: _destination } => {
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drtioaux::Packet::CoreMgmtRebootRequest { destination: _destination } => {
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forward!(router, _routing_table, _destination, *rank, *self_destination, _repeaters, &packet);
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forward!(router, _routing_table, _destination, *rank, *self_destination, _repeaters, &packet);
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)?;
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })?;
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warn!("restarting");
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warn!("restarting");
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unsafe { spiflash::reload(); }
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unsafe { spiflash::reload(); }
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}
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}
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@ -45,7 +45,7 @@ impl Manager {
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Err(err) => {
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Err(err) => {
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self.clear_data();
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self.clear_data();
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error!("error on reading key: {:?}", err);
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error!("error on reading key: {:?}", err);
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return drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack);
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return drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false });
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}
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}
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};
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};
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@ -53,7 +53,7 @@ impl Manager {
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match key.as_str() {
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match key.as_str() {
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"gateware" | "bootloader" | "firmware" => {
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"gateware" | "bootloader" | "firmware" => {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)?;
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })?;
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#[cfg(not(soc_platform = "efc"))]
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#[cfg(not(soc_platform = "efc"))]
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unsafe {
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unsafe {
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clock::spin_us(10000);
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clock::spin_us(10000);
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@ -71,11 +71,7 @@ impl Manager {
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self.clear_data();
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self.clear_data();
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if succeeded {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded })
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtAck)
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} else {
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drtioaux::send(0, &drtioaux::Packet::CoreMgmtNack)
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}
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}
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}
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}
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}
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}
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}
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