forked from M-Labs/artiq
ad9910: Add bitsizes to docstrings (#2505)
Co-authored-by: architeuthidae <am@m-labs.hk>
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@ -390,7 +390,7 @@ class AD9910:
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manual_osk_external: TInt32 = 0,
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manual_osk_external: TInt32 = 0,
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osk_enable: TInt32 = 0,
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osk_enable: TInt32 = 0,
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select_auto_osk: TInt32 = 0):
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select_auto_osk: TInt32 = 0):
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"""Set CFR1. See the AD9910 datasheet for parameter meanings.
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"""Set CFR1. See the AD9910 datasheet for parameter meanings and sizes.
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This method does not pulse ``IO_UPDATE.``
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This method does not pulse ``IO_UPDATE.``
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@ -429,7 +429,7 @@ class AD9910:
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effective_ftw: TInt32 = 1,
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effective_ftw: TInt32 = 1,
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sync_validation_disable: TInt32 = 0,
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sync_validation_disable: TInt32 = 0,
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matched_latency_enable: TInt32 = 0):
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matched_latency_enable: TInt32 = 0):
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"""Set CFR2. See the AD9910 datasheet for parameter meanings.
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"""Set CFR2. See the AD9910 datasheet for parameter meanings and sizes.
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This method does not pulse ``IO_UPDATE``.
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This method does not pulse ``IO_UPDATE``.
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@ -617,12 +617,12 @@ class AD9910:
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profile: TInt32 = _DEFAULT_PROFILE_RAM,
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profile: TInt32 = _DEFAULT_PROFILE_RAM,
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nodwell_high: TInt32 = 0, zero_crossing: TInt32 = 0,
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nodwell_high: TInt32 = 0, zero_crossing: TInt32 = 0,
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mode: TInt32 = 1):
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mode: TInt32 = 1):
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"""Set the RAM profile settings.
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"""Set the RAM profile settings. See also AD9910 datasheet.
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:param start: Profile start address in RAM.
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:param start: Profile start address in RAM (10-bit).
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:param end: Profile end address in RAM (last address).
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:param end: Profile end address in RAM, inclusive (10-bit).
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:param step: Profile time step in units of t_DDS, typically 4 ns
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:param step: Profile time step, counted in DDS sample clock
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(default: 1).
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cycles, typically 4 ns (16-bit, default: 1)
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:param profile: Profile index (0 to 7) (default: 0).
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:param profile: Profile index (0 to 7) (default: 0).
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:param nodwell_high: No-dwell high bit (default: 0,
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:param nodwell_high: No-dwell high bit (default: 0,
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see AD9910 documentation).
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see AD9910 documentation).
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