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targets/pipstrello: fix mem_map

This commit is contained in:
Sebastien Bourdeauducq 2015-04-14 19:34:14 +08:00
parent ff9a7727d2
commit c0f1708c20
1 changed files with 1 additions and 1 deletions
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2
soc/targets/artiq_pipistrello.py
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@ -55,7 +55,7 @@ class _Peripherals(BaseSoC):
"rtio": 0x20000000, # (shadow @0xa0000000) "rtio": 0x20000000, # (shadow @0xa0000000)
"dds": 0x50000000, # (shadow @0xd0000000) "dds": 0x50000000, # (shadow @0xd0000000)
} }
mem_map.update(MiniSoC.mem_map) mem_map.update(BaseSoC.mem_map)
def __init__(self, platform, cpu_type="or1k", **kwargs): def __init__(self, platform, cpu_type="or1k", **kwargs):
BaseSoC.__init__(self, platform, cpu_type=cpu_type, **kwargs) BaseSoC.__init__(self, platform, cpu_type=cpu_type, **kwargs)