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phaser: comment out stpl test

This commit is contained in:
Robert Jördens 2016-10-11 19:50:19 +02:00
parent 2b1cca2e7e
commit bae5b73155
1 changed files with 8 additions and 7 deletions
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15
artiq/gateware/targets/kc705.py
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@ -544,13 +544,14 @@ class Phaser(_NIST_Ions):
# while at 5 GBps, take every second sample... FIXME # while at 5 GBps, take every second sample... FIXME
self.comb += conv.eq(Cat(ch.o[::2])) self.comb += conv.eq(Cat(ch.o[::2]))
# short transport layer test pattern if False:
self.comb += [ # short transport layer test pattern
self.ad9154.jesd_core.transport.sink.converter0.eq(0x01230123), self.comb += [
self.ad9154.jesd_core.transport.sink.converter1.eq(0x45674567), self.ad9154.jesd_core.transport.sink.converter0.eq(0x01230123),
self.ad9154.jesd_core.transport.sink.converter2.eq(0x89ab89ab), self.ad9154.jesd_core.transport.sink.converter1.eq(0x45674567),
self.ad9154.jesd_core.transport.sink.converter3.eq(0xcdefcdef) self.ad9154.jesd_core.transport.sink.converter2.eq(0x89ab89ab),
] self.ad9154.jesd_core.transport.sink.converter3.eq(0xcdefcdef)
]
self.comb += jesd_sync.eq(self.ad9154.jesd_sync) self.comb += jesd_sync.eq(self.ad9154.jesd_sync)