forked from M-Labs/artiq
test/thorlabs_tcube: fix default serial port
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parent
28bce9ee40
commit
ac697e3248
@ -137,11 +137,8 @@ class GenericTpzTest:
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@unittest.skipIf(no_hardware, "no hardware")
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@unittest.skipIf(no_hardware, "no hardware")
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class TestTdc(unittest.TestCase, GenericTdcTest):
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class TestTdc(unittest.TestCase, GenericTdcTest):
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def setUp(self):
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def setUp(self):
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serial = os.getenv("ARTIQ_TDC001_SERIAL")
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serial_dev = os.getenv("ARTIQ_TDC001_SERIAL", "/dev/ttyUSB0")
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args = dict()
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self.cont = Tdc(serial_dev=serial_dev)
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if serial is not None:
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args["serial_dev"] = serial
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self.cont = Tdc(**args)
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class TestTdcSim(unittest.TestCase, GenericTdcTest):
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class TestTdcSim(unittest.TestCase, GenericTdcTest):
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@ -152,11 +149,8 @@ class TestTdcSim(unittest.TestCase, GenericTdcTest):
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@unittest.skipIf(no_hardware, "no hardware")
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@unittest.skipIf(no_hardware, "no hardware")
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class TestTpz(unittest.TestCase, GenericTpzTest):
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class TestTpz(unittest.TestCase, GenericTpzTest):
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def setUp(self):
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def setUp(self):
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serial = os.getenv("ARTIQ_TPZ001_SERIAL")
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serial_dev = os.getenv("ARTIQ_TPZ001_SERIAL", "/dev/ttyUSB0")
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args = dict()
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self.cont = Tpz(serial_dev=serial_dev)
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if serial is not None:
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args["serial_dev"] = serial
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self.cont = Tpz(**args)
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class TestTpzSim(unittest.TestCase, GenericTpzTest):
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class TestTpzSim(unittest.TestCase, GenericTpzTest):
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