forked from M-Labs/artiq
Revert "gateware/rt2wb: only input when active"
This reverts commit 1b08e65fa1
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@ -39,6 +39,6 @@ class RT2WB(Module):
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wb.cyc.eq(active),
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wb.stb.eq(active),
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self.rtlink.i.stb.eq(active & wb.ack & ~wb.we),
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self.rtlink.i.stb.eq(wb.ack & ~wb.we),
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self.rtlink.i.data.eq(wb.dat_r)
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]
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