occheung
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

serwb/kusphy: use same serwb_serdes_5x reset than s7phy

This commit is contained in:
Florent Kermarrec 2018-01-09 18:54:05 +01:00
parent 267c699835
commit 9c6a7f7509
1 changed files with 1 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
artiq/gateware/serwb/kusphy.py
View File

@ -48,7 +48,7 @@ class KUSSerdes(Module):
self.cd_serwb_serdes_20x.clk.eq(pll.serwb_serdes_20x_clk)
]
self.specials += AsyncResetSynchronizer(self.cd_serwb_serdes, ~pll.lock)
self.specials += AsyncResetSynchronizer(self.cd_serwb_serdes_5x, ~pll.lock)
self.comb += self.cd_serwb_serdes_5x.rst.eq(self.cd_serwb_serdes.rst)
# control/status cdc
tx_idle = Signal()