forked from M-Labs/artiq
dma: gate ddma features behind cfg(has_drtio)
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e9a153b985
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9150230ea7
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@ -405,6 +405,7 @@ extern fn dma_playback(timestamp: i64, ptr: i32) {
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csr::cri_con::selected_write(1);
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csr::cri_con::selected_write(1);
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csr::rtio_dma::enable_write(1);
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csr::rtio_dma::enable_write(1);
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#[cfg(has_drtio)]
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send(&DmaStartRemoteRequest { id: ptr as i32, timestamp: timestamp });
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send(&DmaStartRemoteRequest { id: ptr as i32, timestamp: timestamp });
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while csr::rtio_dma::enable_read() != 0 {}
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while csr::rtio_dma::enable_read() != 0 {}
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csr::cri_con::selected_write(0);
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csr::cri_con::selected_write(0);
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@ -427,24 +428,30 @@ extern fn dma_playback(timestamp: i64, ptr: i32) {
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}
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}
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}
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}
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#[cfg(has_drtio)]
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{
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send(&DmaAwaitRemoteRequest { id: ptr as i32 });
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send(&DmaAwaitRemoteRequest { id: ptr as i32 });
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recv!(&DmaAwaitRemoteReply { timeout, error, channel, timestamp } => {
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recv!(&DmaAwaitRemoteReply { timeout, error, channel, timestamp } => {
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if timeout {
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if timeout {
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println!("timeout\n");
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raise!("DMAError",
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raise!("DMAError",
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"Error running DMA on satellite device, timed out waiting for results");
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"Error running DMA on satellite device, timed out waiting for results");
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}
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}
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if error & 1 != 0 {
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if error & 1 != 0 {
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println!("rtio underflow from ddma\n");
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raise!("RTIOUnderflow",
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raise!("RTIOUnderflow",
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"RTIO underflow at channel {rtio_channel_info:0}, {1} mu",
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"RTIO underflow at channel {rtio_channel_info:0}, {1} mu",
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channel as i64, timestamp as i64, 0);
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channel as i64, timestamp as i64, 0);
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}
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}
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if error & 2 != 0 {
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if error & 2 != 0 {
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println!("rtio destun from ddma\n");
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raise!("RTIODestinationUnreachable",
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raise!("RTIODestinationUnreachable",
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"RTIO destination unreachable, output, at channel {rtio_channel_info:0}, {1} mu",
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"RTIO destination unreachable, output, at channel {rtio_channel_info:0}, {1} mu",
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channel as i64, timestamp as i64, 0);
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channel as i64, timestamp as i64, 0);
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}
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}
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});
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});
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}
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}
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}
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#[cfg(not(has_rtio_dma))]
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#[cfg(not(has_rtio_dma))]
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#[unwind(allowed)]
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#[unwind(allowed)]
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@ -218,12 +218,13 @@ impl Manager {
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self.recording_trace.extend_from_slice(data)
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self.recording_trace.extend_from_slice(data)
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}
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}
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pub fn record_stop(&mut self, duration: u64, enable_ddma: bool,
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pub fn record_stop(&mut self, duration: u64, _enable_ddma: bool,
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_io: &Io, _ddma_mutex: &Mutex) -> u32 {
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_io: &Io, _ddma_mutex: &Mutex) -> u32 {
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let mut local_trace = Vec::new();
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let mut local_trace = Vec::new();
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let mut remote_traces: BTreeMap<u8, Vec<u8>> = BTreeMap::new();
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let mut _remote_traces: BTreeMap<u8, Vec<u8>> = BTreeMap::new();
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if enable_ddma {
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#[cfg(has_drtio)]
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if _enable_ddma {
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let mut trace = Vec::new();
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let mut trace = Vec::new();
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mem::swap(&mut self.recording_trace, &mut trace);
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mem::swap(&mut self.recording_trace, &mut trace);
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trace.push(0);
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trace.push(0);
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@ -239,10 +240,10 @@ impl Manager {
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local_trace.extend(&trace[ptr..ptr+len]);
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local_trace.extend(&trace[ptr..ptr+len]);
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}
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}
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else {
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else {
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if let Some(remote_trace) = remote_traces.get_mut(&destination) {
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if let Some(remote_trace) = _remote_traces.get_mut(&destination) {
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remote_trace.extend(&trace[ptr..ptr+len]);
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remote_trace.extend(&trace[ptr..ptr+len]);
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} else {
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} else {
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remote_traces.insert(destination, trace[ptr..ptr+len].to_vec());
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_remote_traces.insert(destination, trace[ptr..ptr+len].to_vec());
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}
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}
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}
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}
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// and jump to the next event
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// and jump to the next event
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@ -278,7 +279,7 @@ impl Manager {
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self.name_map.insert(name, id);
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self.name_map.insert(name, id);
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#[cfg(has_drtio)]
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#[cfg(has_drtio)]
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remote_dma::add_traces(_io, _ddma_mutex, id, remote_traces);
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remote_dma::add_traces(_io, _ddma_mutex, id, _remote_traces);
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id
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id
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}
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}
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