occheung
/
artiq
forked from M-Labs/artiq
1
0
Fork 0
Code Pull Requests Activity

doc: DMA can also raise RTIOUnderflow

This commit is contained in:
Sebastien Bourdeauducq 2018-03-03 13:14:34 +08:00
parent 232940e17f
commit 87b51cbcc2
1 changed files with 2 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
artiq/coredevice/exceptions.py
View File

@ -71,8 +71,8 @@ class CacheError(Exception):
class RTIOUnderflow(Exception):
"""Raised when the CPU fails to submit a RTIO event early enough
(with respect to the event's timestamp).
"""Raised when the CPU or DMA core fails to submit a RTIO event early
enough (with respect to the event's timestamp).
The offending event is discarded and the RTIO core keeps operating.
"""