occheung/artiq
1
0
Fork 0
forked from M-Labs/artiq
Code Pull Requests Activity

Delay.{expr→interval}.

Browse Source
This commit is contained in:
whitequark 2015-12-16 13:47:39 +08:00
parent bf29e8ddc6
commit 8751d2ee6c
3 changed files with 11 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
artiq/compiler/algorithms/inline.py
View File

@ -59,7 +59,7 @@ def inline(call_insn):
other_substs = {var: mapped_substs[var]
for var in mapped_substs
if not isinstance(mapped_substs[var], ir.Constant)}
target_insn = ir.Delay(source_insn.expr.fold(const_substs), other_substs,
target_insn = ir.Delay(source_insn.interval.fold(const_substs), other_substs,
value_map[source_insn.decomposition()],
value_map[source_insn.target()])
else:

12
artiq/compiler/ir.py
View File

@ -1294,31 +1294,31 @@ class Delay(Terminator):
A delay operation. Ties an :class:`iodelay.Expr` to SSA values so that
inlining could lead to the expression folding to a constant.
:ivar expr: (:class:`iodelay.Expr`) expression
:ivar interval: (:class:`iodelay.Expr`) expression
:ivar var_names: (list of string)
iodelay variable names corresponding to operands
"""
"""
:param expr: (:class:`iodelay.Expr`) expression
:param interval: (:class:`iodelay.Expr`) expression
:param substs: (dict of str to :class:`Value`)
SSA values corresponding to iodelay variable names
:param call: (:class:`Call` or ``Constant(None, builtins.TNone())``)
the call instruction that caused this delay, if any
:param target: (:class:`BasicBlock`) branch target
"""
def __init__(self, expr, substs, decomposition, target, name=""):
def __init__(self, interval, substs, decomposition, target, name=""):
for var_name in substs: assert isinstance(var_name, str)
assert isinstance(decomposition, Call) or \
isinstance(decomposition, Builtin) and decomposition.op in ("delay", "delay_mu")
assert isinstance(target, BasicBlock)
super().__init__([decomposition, target, *substs.values()], builtins.TNone(), name)
self.expr = expr
self.interval = interval
self.var_names = list(substs.keys())
def copy(self, mapper):
self_copy = super().copy(mapper)
self_copy.expr = self.expr
self_copy.interval = self.interval
self_copy.var_names = list(self.var_names)
return self_copy
@ -1352,7 +1352,7 @@ class Delay(Terminator):
return result
def opcode(self):
return "delay({})".format(self.expr)
return "delay({})".format(self.interval)
class Parallel(Terminator):
"""

8
artiq/compiler/transforms/interleaver.py
View File

@ -32,7 +32,7 @@ def iodelay_of_block(block):
terminator = block.terminator()
if isinstance(terminator, ir.Delay):
# We should be able to fold everything without free variables.
folded_expr = terminator.expr.fold()
folded_expr = terminator.interval.fold()
assert iodelay.is_const(folded_expr)
return folded_expr.value
else:
@ -57,7 +57,7 @@ class Interleaver:
def process_function(self, func):
for insn in func.instructions():
if isinstance(insn, ir.Delay):
if any(insn.expr.free_vars()):
if any(insn.interval.free_vars()):
# If a function has free variables in delay expressions,
# that means its IO delay depends on arguments.
# Do not change such functions in any way so that it will
@ -121,7 +121,7 @@ class Interleaver:
new_decomp.loc = old_decomp.loc
source_terminator.basic_block.insert(new_decomp, before=source_terminator)
source_terminator.expr = iodelay.Const(target_time_delta)
source_terminator.interval = iodelay.Const(target_time_delta)
source_terminator.set_decomposition(new_decomp)
else:
source_terminator.replace_with(ir.Branch(source_terminator.target()))
@ -141,7 +141,7 @@ class Interleaver:
postdom_tree = domination.PostDominatorTree(func)
continue
elif target_time_delta > 0:
source_terminator.expr = iodelay.Const(target_time_delta)
source_terminator.interval = iodelay.Const(target_time_delta)
else:
source_terminator.replace_with(ir.Branch(source_terminator.target()))