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fix more multi-DDS-bus problems

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This commit is contained in:
Sebastien Bourdeauducq 2016-03-09 19:03:05 +08:00
parent de37487a5c
commit 861c4a9ae5
2 changed files with 10 additions and 5 deletions
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13
artiq/runtime/dds.c
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@ -82,7 +82,7 @@ void dds_init(long long int timestamp, int bus_channel, int channel)
/* Compensation to keep phase continuity when switching from absolute or tracking /* Compensation to keep phase continuity when switching from absolute or tracking
* to continuous phase mode. */ * to continuous phase mode. */
static unsigned int continuous_phase_comp[CONFIG_DDS_CHANNEL_COUNT]; static unsigned int continuous_phase_comp[CONFIG_RTIO_DDS_COUNT][CONFIG_DDS_CHANNELS_PER_BUS];
static void dds_set_one(long long int now, long long int ref_time, static void dds_set_one(long long int now, long long int ref_time,
int bus_channel, int channel, int bus_channel, int channel,
@ -90,10 +90,15 @@ static void dds_set_one(long long int now, long long int ref_time,
{ {
unsigned int channel_enc; unsigned int channel_enc;
if(channel >= CONFIG_DDS_CHANNEL_COUNT) { if((channel < 0) || (channel >= CONFIG_DDS_CHANNELS_PER_BUS)) {
core_log("Attempted to set invalid DDS channel\n"); core_log("Attempted to set invalid DDS channel\n");
return; return;
} }
if((bus_channel < CONFIG_RTIO_FIRST_DDS_CHANNEL)
|| (bus_channel >= (CONFIG_RTIO_FIRST_DDS_CHANNEL+CONFIG_RTIO_DDS_COUNT))) {
core_log("Attempted to use invalid DDS bus\n");
return;
}
#ifdef CONFIG_DDS_ONEHOT_SEL #ifdef CONFIG_DDS_ONEHOT_SEL
channel_enc = 1 << channel; channel_enc = 1 << channel;
#else #else
@ -125,7 +130,7 @@ static void dds_set_one(long long int now, long long int ref_time,
/* Disable autoclear phase accumulator and enables OSK. */ /* Disable autoclear phase accumulator and enables OSK. */
DDS_WRITE(DDS_CFR1L, 0x0108); DDS_WRITE(DDS_CFR1L, 0x0108);
#endif #endif
pow += continuous_phase_comp[channel]; pow += continuous_phase_comp[bus_channel-CONFIG_RTIO_FIRST_DDS_CHANNEL][channel];
} else { } else {
long long int fud_time; long long int fud_time;
@ -141,7 +146,7 @@ static void dds_set_one(long long int now, long long int ref_time,
pow -= (ref_time - fud_time)*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH); pow -= (ref_time - fud_time)*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
if(phase_mode == PHASE_MODE_TRACKING) if(phase_mode == PHASE_MODE_TRACKING)
pow += ref_time*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH); pow += ref_time*CONFIG_DDS_RTIO_CLK_RATIO*ftw >> (32-DDS_POW_WIDTH);
continuous_phase_comp[channel] = pow; continuous_phase_comp[bus_channel-CONFIG_RTIO_FIRST_DDS_CHANNEL][channel] = pow;
} }
#ifdef CONFIG_DDS_AD9858 #ifdef CONFIG_DDS_AD9858

2
artiq/runtime/test_mode.c
View File

@ -305,7 +305,7 @@ static void do_ddstest_one(unsigned int i)
brg_ddswrite(bus_channel, DDS_FTWL, f & 0xffff); brg_ddswrite(bus_channel, DDS_FTWL, f & 0xffff);
brg_ddswrite(bus_channel, DDS_FTWH, (f >> 16) & 0xffff); brg_ddswrite(bus_channel, DDS_FTWH, (f >> 16) & 0xffff);
#endif #endif
brg_ddsfud(); brg_ddsfud(bus_channel);
#ifdef CONFIG_DDS_AD9858 #ifdef CONFIG_DDS_AD9858
g = brg_ddsread(bus_channel, DDS_FTW0); g = brg_ddsread(bus_channel, DDS_FTW0);
g |= brg_ddsread(bus_channel, DDS_FTW1) << 8; g |= brg_ddsread(bus_channel, DDS_FTW1) << 8;