forked from M-Labs/artiq
artiq_netboot: moved to git.m-labs.hk/M-Labs/artiq-netboot
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parent
e66d2a6408
commit
7a5996ba79
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@ -1,50 +0,0 @@
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#!/usr/bin/env python3
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import argparse
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import socket
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import struct
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import os
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def send_file(sock, filename):
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with open(filename, "rb") as input_file:
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sock.sendall(struct.pack(">I", os.fstat(input_file.fileno()).st_size))
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while True:
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data = input_file.read(4096)
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if not data:
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break
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sock.sendall(data)
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sock.sendall(b"OK")
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def main():
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parser = argparse.ArgumentParser(description="ARTIQ netboot tool")
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parser.add_argument("hostname", metavar="HOSTNAME",
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help="hostname of the target board")
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parser.add_argument("-f", "--firmware", nargs=1,
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help="firmware to load")
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# Note that on softcore systems, the main gateware cannot be replaced
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# with -g. This option is used for loading the RTM FPGA from the AMC
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# on Sayma, and the PL on Zynq.
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parser.add_argument("-g", "--gateware", nargs=1,
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help="gateware to load")
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parser.add_argument("-b", "--boot", action="store_true",
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help="boot the device")
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args = parser.parse_args()
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sock = socket.create_connection((args.hostname, 4269))
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try:
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if args.firmware is not None:
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sock.sendall(b"F")
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send_file(sock, args.firmware[0])
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if args.gateware is not None:
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sock.sendall(b"G")
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send_file(sock, args.gateware[0])
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if args.boot:
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sock.sendall(b"B")
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finally:
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sock.close()
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if __name__ == "__main__":
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main()
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1
setup.py
1
setup.py
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@ -24,7 +24,6 @@ console_scripts = [
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"artiq_coreanalyzer = artiq.frontend.artiq_coreanalyzer:main",
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"artiq_coremgmt = artiq.frontend.artiq_coremgmt:main",
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"artiq_ddb_template = artiq.frontend.artiq_ddb_template:main",
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"artiq_netboot = artiq.frontend.artiq_netboot:main",
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"artiq_master = artiq.frontend.artiq_master:main",
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"artiq_mkfs = artiq.frontend.artiq_mkfs:main",
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"artiq_rtiomon = artiq.frontend.artiq_rtiomon:main",
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