forked from M-Labs/artiq
analyzer: fix get_dds_sysclk
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@ -327,7 +327,7 @@ def get_ref_period(devices):
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def get_dds_sysclk(devices):
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def get_dds_sysclk(devices):
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return get_single_device_argument(devices, "artiq.coredevice.core",
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return get_single_device_argument(devices, "artiq.coredevice.dds",
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"CoreDDS", "sysclk")
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"CoreDDS", "sysclk")
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