forked from M-Labs/artiq
fold comm device into core device
This commit is contained in:
parent
e7382f4753
commit
5ccca74a3f
@ -36,6 +36,8 @@ Release notes
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identifiers (``true``, ``null``, ...) with their Python equivalents
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identifiers (``true``, ``null``, ...) with their Python equivalents
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(``True``, ``None` ...).
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(``True``, ``None` ...).
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* Controllers are now named ``aqctl_XXX`` instead of ``XXX_controller``.
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* Controllers are now named ``aqctl_XXX`` instead of ``XXX_controller``.
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* In the device database, the "comm" device has been folded into the "core" device.
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Move the "host" argument into the "core" device, and remove the "comm" device.
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2.3
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2.3
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@ -109,8 +109,34 @@ def initialize_connection(host, port):
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return sock
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return sock
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class CommKernelDummy:
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def __init__(self):
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pass
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def switch_clock(self, external):
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pass
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def load(self, kernel_library):
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pass
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def run(self):
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pass
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def serve(self, embedding_map, symbolizer, demangler):
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pass
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def check_system_info(self):
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pass
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def get_log(self):
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return ""
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def clear_log(self):
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pass
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class CommKernel:
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class CommKernel:
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def __init__(self, dmgr, host, port=1381):
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def __init__(self, host, port=1381):
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self._read_type = None
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self._read_type = None
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self.host = host
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self.host = host
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self.port = port
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self.port = port
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@ -1,27 +0,0 @@
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from operator import itemgetter
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class CommKernel:
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def __init__(self, dmgr):
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super().__init__()
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def switch_clock(self, external):
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pass
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def load(self, kernel_library):
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pass
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def run(self):
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pass
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def serve(self, embedding_map, symbolizer, demangler):
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pass
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def check_system_info(self):
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pass
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def get_log(self):
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return ""
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def clear_log(self):
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pass
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@ -42,7 +42,7 @@ def initialize_connection(host, port):
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class CommMgmt:
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class CommMgmt:
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def __init__(self, dmgr, host, port=1380):
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def __init__(self, host, port=1380):
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self.host = host
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self.host = host
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self.port = port
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self.port = port
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@ -13,6 +13,7 @@ from artiq.compiler.module import Module
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from artiq.compiler.embedding import Stitcher
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from artiq.compiler.embedding import Stitcher
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from artiq.compiler.targets import OR1KTarget
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from artiq.compiler.targets import OR1KTarget
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from artiq.coredevice.comm_kernel import CommKernel, CommKernelDummy
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# Import for side effects (creating the exception classes).
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# Import for side effects (creating the exception classes).
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from artiq.coredevice import exceptions
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from artiq.coredevice import exceptions
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@ -50,6 +51,7 @@ def rtio_get_counter() -> TInt64:
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class Core:
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class Core:
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"""Core device driver.
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"""Core device driver.
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:param host: hostname or IP address of the core device.
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:param ref_period: period of the reference clock for the RTIO subsystem.
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:param ref_period: period of the reference clock for the RTIO subsystem.
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On platforms that use clock multiplication and SERDES-based PHYs,
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On platforms that use clock multiplication and SERDES-based PHYs,
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this is the period after multiplication. For example, with a RTIO core
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this is the period after multiplication. For example, with a RTIO core
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@ -61,7 +63,6 @@ class Core:
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:param ref_multiplier: ratio between the RTIO fine timestamp frequency
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:param ref_multiplier: ratio between the RTIO fine timestamp frequency
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and the RTIO coarse timestamp frequency (e.g. SERDES multiplication
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and the RTIO coarse timestamp frequency (e.g. SERDES multiplication
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factor).
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factor).
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:param comm_device: name of the device used for communications.
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"""
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"""
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kernel_invariants = {
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kernel_invariants = {
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@ -69,13 +70,16 @@ class Core:
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"external_clock",
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"external_clock",
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}
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}
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def __init__(self, dmgr, ref_period, external_clock=False,
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def __init__(self, dmgr, host, ref_period, external_clock=False,
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ref_multiplier=8, comm_device="comm"):
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ref_multiplier=8):
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self.ref_period = ref_period
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self.ref_period = ref_period
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self.external_clock = external_clock
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self.external_clock = external_clock
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self.ref_multiplier = ref_multiplier
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self.ref_multiplier = ref_multiplier
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self.coarse_ref_period = ref_period*ref_multiplier
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self.coarse_ref_period = ref_period*ref_multiplier
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self.comm = dmgr.get(comm_device)
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if host is None:
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self.comm = CommKernelDummy()
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else:
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self.comm = CommKernel(host)
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self.first_run = True
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self.first_run = True
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self.dmgr = dmgr
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self.dmgr = dmgr
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@ -197,7 +197,7 @@ class _DeviceManager:
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try:
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try:
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if v["type"] == "local":
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if v["type"] == "local":
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widget = None
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widget = None
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if k == "comm":
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if k == "core":
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self.core_addr = v["arguments"]["host"]
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self.core_addr = v["arguments"]["host"]
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self.new_core_addr.set()
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self.new_core_addr.set()
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elif v["module"] == "artiq.coredevice.ttl":
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elif v["module"] == "artiq.coredevice.ttl":
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@ -3,17 +3,11 @@
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# The list of devices here is not exhaustive.
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# The list of devices here is not exhaustive.
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device_db = {
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device_db = {
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"comm": {
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"type": "local",
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"module": "artiq.coredevice.comm_kernel",
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"class": "CommKernel",
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"arguments": {"host": "kc705.lab.m-labs.hk"}
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},
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"core": {
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"core": {
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.core",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"class": "Core",
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"arguments": {"ref_period": 2e-9}
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"arguments": {"host": "kc705.lab.m-labs.hk", "ref_period": 2e-9}
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},
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},
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"core_cache": {
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"core_cache": {
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"type": "local",
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"type": "local",
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@ -3,17 +3,11 @@
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# The list of devices here is not exhaustive.
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# The list of devices here is not exhaustive.
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device_db = {
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device_db = {
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"comm": {
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"type": "local",
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"module": "artiq.coredevice.comm_kernel",
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"class": "CommKernel",
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"arguments": {"host": "kc705.lab.m-labs.hk"}
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},
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"core": {
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"core": {
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.core",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"class": "Core",
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"arguments": {"ref_period": 1e-9}
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"arguments": {"host": "kc705.lab.m-labs.hk", "ref_period": 1e-9}
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},
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},
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"core_cache": {
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"core_cache": {
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"type": "local",
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"type": "local",
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@ -1,17 +1,12 @@
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# The RTIO channel numbers here are for Phaser on KC705.
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# The RTIO channel numbers here are for Phaser on KC705.
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device_db = {
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device_db = {
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"comm": {
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"type": "local",
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"module": "artiq.coredevice.comm_kernel",
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"class": "CommKernel",
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"arguments": {"host": "kc705aux.lab.m-labs.hk"}
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},
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"core": {
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"core": {
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.core",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"class": "Core",
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"arguments": {
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"arguments": {
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"host": "kc705aux.lab.m-labs.hk",
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"ref_period": 5e-9/6
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"ref_period": 5e-9/6
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}
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}
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},
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},
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@ -43,7 +43,7 @@ def main():
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with open(args.read_dump, "rb") as f:
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with open(args.read_dump, "rb") as f:
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dump = f.read()
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dump = f.read()
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else:
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else:
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core_addr = device_mgr.get_desc("comm")["arguments"]["host"]
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core_addr = device_mgr.get_desc("core")["arguments"]["host"]
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dump = get_analyzer_dump(core_addr)
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dump = get_analyzer_dump(core_addr)
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decoded_dump = decode_dump(dump)
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decoded_dump = decode_dump(dump)
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if args.print_decoded:
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if args.print_decoded:
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init_logger(args)
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init_logger(args)
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device_mgr = DeviceManager(DeviceDB(args.device_db))
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device_mgr = DeviceManager(DeviceDB(args.device_db))
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try:
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try:
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core_addr = device_mgr.get_desc("comm")["arguments"]["host"]
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core_addr = device_mgr.get_desc("core")["arguments"]["host"]
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mgmt = CommMgmt(device_mgr, core_addr)
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mgmt = CommMgmt(device_mgr, core_addr)
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if args.action == "reboot":
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if args.action == "reboot":
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mgmt.reboot()
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mgmt.reboot()
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init_logger(args)
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init_logger(args)
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device_mgr = DeviceManager(DeviceDB(args.device_db))
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device_mgr = DeviceManager(DeviceDB(args.device_db))
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try:
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try:
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comm = device_mgr.get("comm")
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comm = device_mgr.get("core").comm
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comm.check_system_info()
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comm.check_system_info()
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if args.action == "read":
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if args.action == "read":
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@ -37,7 +37,7 @@ def main():
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args = get_argparser().parse_args()
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args = get_argparser().parse_args()
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init_logger(args)
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init_logger(args)
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core_addr = DeviceDB(args.device_db).get("comm")["arguments"]["host"]
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core_addr = DeviceDB(args.device_db).get("core")["arguments"]["host"]
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mgmt = CommMgmt(None, core_addr)
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mgmt = CommMgmt(None, core_addr)
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try:
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try:
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if args.action == "set_level":
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if args.action == "set_level":
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@ -40,7 +40,7 @@ class WriteLog(EnvExperiment):
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class AnalyzerTest(ExperimentCase):
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class AnalyzerTest(ExperimentCase):
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def test_ttl_pulse(self):
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def test_ttl_pulse(self):
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core_host = self.device_mgr.get_desc("comm")["arguments"]["host"]
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core_host = self.device_mgr.get_desc("core")["arguments"]["host"]
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exp = self.create(CreateTTLPulse)
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exp = self.create(CreateTTLPulse)
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exp.initialize_io()
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exp.initialize_io()
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@ -64,7 +64,7 @@ class AnalyzerTest(ExperimentCase):
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1000, delta=1)
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1000, delta=1)
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def test_rtio_log(self):
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def test_rtio_log(self):
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core_host = self.device_mgr.get_desc("comm")["arguments"]["host"]
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core_host = self.device_mgr.get_desc("core")["arguments"]["host"]
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exp = self.create(WriteLog)
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exp = self.create(WriteLog)
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get_analyzer_dump(core_host) # clear analyzer buffer
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get_analyzer_dump(core_host) # clear analyzer buffer
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@ -6,7 +6,7 @@ from artiq.test.hardware_testbench import ExperimentCase
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class MonInjTest(ExperimentCase):
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class MonInjTest(ExperimentCase):
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def test_moninj(self):
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def test_moninj(self):
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core_host = self.device_mgr.get_desc("comm")["arguments"]["host"]
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core_host = self.device_mgr.get_desc("core")["arguments"]["host"]
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loop_out_channel = self.device_mgr.get_desc("loop_out")["arguments"]["channel"]
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loop_out_channel = self.device_mgr.get_desc("loop_out")["arguments"]["channel"]
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loop_in_channel = self.device_mgr.get_desc("loop_in")["arguments"]["channel"]
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loop_in_channel = self.device_mgr.get_desc("loop_in")["arguments"]["channel"]
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@ -402,7 +402,7 @@ class CoredeviceTest(ExperimentCase):
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self.execute(SequenceError)
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self.execute(SequenceError)
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def test_collision(self):
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def test_collision(self):
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core_addr = self.device_mgr.get_desc("comm")["arguments"]["host"]
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core_addr = self.device_mgr.get_desc("core")["arguments"]["host"]
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mgmt = CommMgmt(self.device_mgr, core_addr)
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mgmt = CommMgmt(self.device_mgr, core_addr)
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mgmt.clear_log()
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mgmt.clear_log()
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self.execute(Collision)
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self.execute(Collision)
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@ -411,7 +411,7 @@ class CoredeviceTest(ExperimentCase):
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mgmt.close()
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mgmt.close()
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def test_address_collision(self):
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def test_address_collision(self):
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core_addr = self.device_mgr.get_desc("comm")["arguments"]["host"]
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core_addr = self.device_mgr.get_desc("core")["arguments"]["host"]
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mgmt = CommMgmt(self.device_mgr, core_addr)
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mgmt = CommMgmt(self.device_mgr, core_addr)
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mgmt.clear_log()
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mgmt.clear_log()
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self.execute(AddressCollision)
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self.execute(AddressCollision)
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@ -576,7 +576,7 @@ class DMATest(ExperimentCase):
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exp.nested()
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exp.nested()
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def test_dma_trace(self):
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def test_dma_trace(self):
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core_host = self.device_mgr.get_desc("comm")["arguments"]["host"]
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core_host = self.device_mgr.get_desc("core")["arguments"]["host"]
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exp = self.create(_DMA)
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exp = self.create(_DMA)
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exp.record()
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exp.record()
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@ -1,14 +1,8 @@
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device_db = {
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device_db = {
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"comm": {
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"type": "local",
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"module": "artiq.coredevice.comm_kernel_dummy",
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"class": "CommKernel",
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"arguments": {}
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},
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"core": {
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"core": {
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.core",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"class": "Core",
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"arguments": {"ref_period": 1e-9}
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"arguments": {"host": None, "ref_period": 1e-9}
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}
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}
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}
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}
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@ -1,14 +1,8 @@
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device_db = {
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device_db = {
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"comm": {
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"type": "local",
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"module": "artiq.coredevice.comm_kernel_dummy",
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"class": "CommKernel",
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"arguments": {}
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},
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"core": {
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"core": {
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.core",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"class": "Core",
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"arguments": {"ref_period": 1e-9}
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"arguments": {"host": None, "ref_period": 1e-9}
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}
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}
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}
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}
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@ -1,14 +1,8 @@
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device_db = {
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device_db = {
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"comm": {
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"type": "local",
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"module": "artiq.coredevice.comm_kernel_dummy",
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"class": "CommKernel",
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"arguments": {}
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},
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"core": {
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"core": {
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"type": "local",
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"type": "local",
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"module": "artiq.coredevice.core",
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"module": "artiq.coredevice.core",
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"class": "Core",
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"class": "Core",
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"arguments": {"ref_period": 1e-9}
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"arguments": {"host": None, "ref_period": 1e-9}
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}
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}
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}
|
}
|
||||||
|
@ -1,14 +1,8 @@
|
|||||||
device_db = {
|
device_db = {
|
||||||
"comm": {
|
|
||||||
"type": "local",
|
|
||||||
"module": "artiq.coredevice.comm_kernel_dummy",
|
|
||||||
"class": "CommKernel",
|
|
||||||
"arguments": {}
|
|
||||||
},
|
|
||||||
"core": {
|
"core": {
|
||||||
"type": "local",
|
"type": "local",
|
||||||
"module": "artiq.coredevice.core",
|
"module": "artiq.coredevice.core",
|
||||||
"class": "Core",
|
"class": "Core",
|
||||||
"arguments": {"ref_period": 1e-9}
|
"arguments": {"host": None, "ref_period": 1e-9}
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
Loading…
Reference in New Issue
Block a user