forked from M-Labs/artiq
Firmware: set CLK_SEL in io_expander init
io_expander init: set initial out_target instead of 0x00 io_expander0: gate CLK_SEL direction & output
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@ -10,6 +10,25 @@ struct Registers {
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gpiob: u8, // Output Port 1
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gpiob: u8, // Output Port 1
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}
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}
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#[cfg(has_si549)]
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const IODIR_CLK_SEL: u8 = 0x80; // out
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#[cfg(has_si5324)]
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const IODIR_CLK_SEL: u8 = 0x00; // in
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#[cfg(has_si549)]
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const CLK_SEL_OUT: u8 = 1 << 7;
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#[cfg(has_si5324)]
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const CLK_SEL_OUT: u8 = 0;
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const IODIR0 : [u8; 2] = [
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0xFF,
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0xFF & !IODIR_CLK_SEL
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];
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const OUT_TAR0 : [u8; 2] = [
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0,
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CLK_SEL_OUT
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];
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pub struct IoExpander {
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pub struct IoExpander {
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busno: u8,
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busno: u8,
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port: u8,
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port: u8,
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@ -34,9 +53,9 @@ impl IoExpander {
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port: 11,
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port: 11,
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address: 0x40,
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address: 0x40,
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virtual_led_mapping: &VIRTUAL_LED_MAPPING0,
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virtual_led_mapping: &VIRTUAL_LED_MAPPING0,
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iodir: [0xff; 2],
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iodir: IODIR0,
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out_current: [0; 2],
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out_current: [0; 2],
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out_target: [0; 2],
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out_target: OUT_TAR0,
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registers: Registers {
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registers: Registers {
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iodira: 0x00,
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iodira: 0x00,
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iodirb: 0x01,
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iodirb: 0x01,
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@ -153,10 +172,10 @@ impl IoExpander {
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}
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}
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self.update_iodir()?;
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self.update_iodir()?;
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self.out_current[0] = 0x00;
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self.write(self.registers.gpioa, self.out_target[0])?;
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self.write(self.registers.gpioa, 0x00)?;
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self.out_current[0] = self.out_target[0];
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self.out_current[1] = 0x00;
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self.write(self.registers.gpiob, self.out_target[1])?;
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self.write(self.registers.gpiob, 0x00)?;
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self.out_current[1] = self.out_target[1];
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Ok(())
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Ok(())
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}
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}
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