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move kasli_opticlock to kasli_basic

This commit is contained in:
Sebastien Bourdeauducq 2018-05-28 11:02:44 +08:00
parent cc0ddf9d72
commit 4d3f763865
3 changed files with 0 additions and 49 deletions
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0
artiq/examples/kasli_opticlock/device_db.py → artiq/examples/kasli_basic/device_db_opticlock.py
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0
artiq/examples/kasli_opticlock/idle_kernel.py → artiq/examples/kasli_basic/idle_kernel.py
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49
artiq/examples/kasli_opticlock/repository/urukul.py
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@ -1,49 +0,0 @@
from artiq.experiment import *
class UrukulTest(EnvExperiment):
def build(self):
self.setattr_device("core")
self.setattr_device("urukul0_cpld")
self.setattr_device("urukul0_ch0")
self.setattr_device("urukul0_ch1")
self.setattr_device("urukul0_ch2")
self.setattr_device("urukul0_ch3")
self.setattr_device("led0")
@kernel
def run(self):
self.core.reset()
self.led0.on()
delay(5*ms)
self.led0.off()
self.urukul0_cpld.init()
self.urukul0_ch0.init()
self.urukul0_ch1.init()
self.urukul0_ch2.init()
self.urukul0_ch3.init()
delay(1000*us)
self.urukul0_ch0.set(100*MHz)
self.urukul0_ch0.sw.on()
self.urukul0_ch0.set_att(10.)
delay(1000*us)
self.urukul0_ch1.set(10*MHz, 0.5)
self.urukul0_ch1.sw.on()
self.urukul0_ch1.set_att(0.)
delay(1000*us)
self.urukul0_ch2.set(400*MHz)
self.urukul0_ch2.sw.on()
self.urukul0_ch2.set_att(0.)
delay(1000*us)
self.urukul0_ch3.set(1*MHz)
self.urukul0_ch3.sw.on()
self.urukul0_ch3.set_att(20.)
while True:
self.urukul0_ch0.sw.pulse(5*ms)
delay(5*ms)