forked from M-Labs/artiq
coredevice: add AD9154 SPI access driver
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24
artiq/coredevice/ad9154_spi.py
Normal file
24
artiq/coredevice/ad9154_spi.py
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@ -0,0 +1,24 @@
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from artiq.language.core import kernel
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class AD9154:
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"""Kernel interface to AD9154 registers, using non-realtime SPI."""
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def __init__(self, dmgr, spi_device, chip_select):
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self.core = dmgr.get("core")
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self.bus = dmgr.get(spi_device)
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self.chip_select = chip_select
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@kernel
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def setup_bus(self, write_div=16, read_div=16):
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self.bus.set_config_mu(0, write_div, read_div)
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self.bus.set_xfer(self.chip_select, 24, 0)
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@kernel
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def write(self, addr, data):
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self.bus.write((addr << 16) | (data<< 8))
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@kernel
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def read(self, addr):
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self.write((1 << 15) | addr, 0)
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return self.bus.read()
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