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compiler: remove big-endian support. Closes #1590

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Sebastien Bourdeauducq 2021-09-13 13:40:24 +08:00
parent e8a7a8f41e
commit 3ed10221d8
2 changed files with 11 additions and 21 deletions
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8
artiq/compiler/targets.py
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@ -77,9 +77,6 @@ class Target:
:var print_function: (string) :var print_function: (string)
Name of a formatted print functions (with the signature of ``printf``) Name of a formatted print functions (with the signature of ``printf``)
provided by the target, e.g. ``"printf"``. provided by the target, e.g. ``"printf"``.
:var little_endian: (boolean)
Whether the code will be executed on a little-endian machine. This cannot be always
determined from data_layout due to JIT.
:var now_pinning: (boolean) :var now_pinning: (boolean)
Whether the target implements the now-pinning RTIO optimization. Whether the target implements the now-pinning RTIO optimization.
""" """
@ -87,7 +84,6 @@ class Target:
data_layout = "" data_layout = ""
features = [] features = []
print_function = "printf" print_function = "printf"
little_endian = False
now_pinning = True now_pinning = True
tool_ld = "ld.lld" tool_ld = "ld.lld"
@ -255,15 +251,12 @@ class NativeTarget(Target):
super().__init__() super().__init__()
self.triple = llvm.get_default_triple() self.triple = llvm.get_default_triple()
host_data_layout = str(llvm.targets.Target.from_default_triple().create_target_machine().target_data) host_data_layout = str(llvm.targets.Target.from_default_triple().create_target_machine().target_data)
assert host_data_layout[0] in "eE"
self.little_endian = host_data_layout[0] == "e"
class RISCVTarget(Target): class RISCVTarget(Target):
triple = "riscv32-unknown-linux" triple = "riscv32-unknown-linux"
data_layout = "e-m:e-p:32:32-i64:64-n32-S128" data_layout = "e-m:e-p:32:32-i64:64-n32-S128"
features = ["m", "a"] features = ["m", "a"]
print_function = "core_log" print_function = "core_log"
little_endian = True
now_pinning = True now_pinning = True
tool_ld = "ld.lld" tool_ld = "ld.lld"
@ -276,7 +269,6 @@ class CortexA9Target(Target):
data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64" data_layout = "e-m:e-p:32:32-i64:64-v128:64:128-a:0:32-n32-S64"
features = ["dsp", "fp16", "neon", "vfp3"] features = ["dsp", "fp16", "neon", "vfp3"]
print_function = "core_log" print_function = "core_log"
little_endian = True
now_pinning = False now_pinning = False
tool_ld = "ld.lld" tool_ld = "ld.lld"

24
artiq/compiler/transforms/llvm_ir_generator.py
View File

@ -1095,15 +1095,12 @@ class LLVMIRGenerator:
return self.map(insn.operands[0]) return self.map(insn.operands[0])
elif insn.op == "now_mu": elif insn.op == "now_mu":
if self.target.now_pinning: if self.target.now_pinning:
# Word swap now.old for little endian target # Word swap now.old as CPU is little endian
# Most significant word is stored in lower address (see generated csr.rs) # Most significant word is stored in lower address (see generated csr.rs)
if self.target.little_endian: llnow_raw = self.llbuilder.load(self.llbuiltin("now"), name=insn.name)
llnow_raw = self.llbuilder.load(self.llbuiltin("now"), name=insn.name) llnow_lo = self.llbuilder.shl(llnow_raw, ll.Constant(lli64, 32))
llnow_lo = self.llbuilder.shl(llnow_raw, ll.Constant(lli64, 32)) llnow_hi = self.llbuilder.lshr(llnow_raw, ll.Constant(lli64, 32))
llnow_hi = self.llbuilder.lshr(llnow_raw, ll.Constant(lli64, 32)) return self.llbuilder.or_(llnow_lo, llnow_hi)
return self.llbuilder.or_(llnow_lo, llnow_hi)
else:
return self.llbuilder.load(self.llbuiltin("now"), name=insn.name)
else: else:
return self.llbuilder.call(self.llbuiltin("now_mu"), []) return self.llbuilder.call(self.llbuiltin("now_mu"), [])
elif insn.op == "at_mu": elif insn.op == "at_mu":
@ -1125,12 +1122,13 @@ class LLVMIRGenerator:
if self.target.now_pinning: if self.target.now_pinning:
llnowptr = self.llbuiltin("now") llnowptr = self.llbuiltin("now")
llnow = self.llbuilder.load(llnowptr, name="now.old") llnow = self.llbuilder.load(llnowptr, name="now.old")
# Word swap now.old for little endian target
# Word swap now.old as CPU is little endian
# Most significant word is stored in lower address (see generated csr.rs) # Most significant word is stored in lower address (see generated csr.rs)
if self.target.little_endian: llnow_lo = self.llbuilder.shl(llnow, ll.Constant(lli64, 32))
llnow_lo = self.llbuilder.shl(llnow, ll.Constant(lli64, 32)) llnow_hi = self.llbuilder.lshr(llnow, ll.Constant(lli64, 32))
llnow_hi = self.llbuilder.lshr(llnow, ll.Constant(lli64, 32)) llnow = self.llbuilder.or_(llnow_lo, llnow_hi)
llnow = self.llbuilder.or_(llnow_lo, llnow_hi)
lladjusted = self.llbuilder.add(llnow, llinterval, name="now.new") lladjusted = self.llbuilder.add(llnow, llinterval, name="now.new")
lladjusted_hi = self.llbuilder.trunc(self.llbuilder.lshr(lladjusted, ll.Constant(lli64, 32)), lli32) lladjusted_hi = self.llbuilder.trunc(self.llbuilder.lshr(lladjusted, ll.Constant(lli64, 32)), lli32)
lladjusted_lo = self.llbuilder.trunc(lladjusted, lli32) lladjusted_lo = self.llbuilder.trunc(lladjusted, lli32)