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Sebastien Bourdeauducq 2017-01-18 17:11:02 -06:00
parent 5c0d402ef3
commit 28a41a2f60
4 changed files with 0 additions and 4 deletions

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@ -111,7 +111,6 @@ class _NIST_Ions(MiniSoC, AMPSoC):
cpu_type=cpu_type, cpu_type=cpu_type,
sdram_controller_type="minicon", sdram_controller_type="minicon",
l2_size=128*1024, l2_size=128*1024,
with_timer=False,
ident=artiq_version, ident=artiq_version,
**kwargs) **kwargs)
AMPSoC.__init__(self) AMPSoC.__init__(self)

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@ -32,7 +32,6 @@ class Master(MiniSoC, AMPSoC):
cpu_type="or1k", cpu_type="or1k",
sdram_controller_type="minicon", sdram_controller_type="minicon",
l2_size=128*1024, l2_size=128*1024,
with_timer=False,
ident=artiq_version, ident=artiq_version,
**kwargs) **kwargs)
AMPSoC.__init__(self) AMPSoC.__init__(self)

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@ -168,7 +168,6 @@ class Phaser(MiniSoC, AMPSoC):
cpu_type=cpu_type, cpu_type=cpu_type,
sdram_controller_type="minicon", sdram_controller_type="minicon",
l2_size=128*1024, l2_size=128*1024,
with_timer=False,
ident=artiq_version, ident=artiq_version,
**kwargs) **kwargs)
AMPSoC.__init__(self) AMPSoC.__init__(self)

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@ -158,7 +158,6 @@ class Demo(BaseSoC, AMPSoC):
BaseSoC.__init__(self, BaseSoC.__init__(self,
cpu_type=cpu_type, cpu_type=cpu_type,
l2_size=64*1024, l2_size=64*1024,
with_timer=False,
ident=artiq_version, ident=artiq_version,
clk_freq=75*1000*1000, clk_freq=75*1000*1000,
**kwargs) **kwargs)