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riscv: add IRQ control

This commit is contained in:
morgan 2024-05-24 10:50:13 +08:00 committed by Sébastien Bourdeauducq
parent 51c15ac777
commit 13830a27af
2 changed files with 50 additions and 0 deletions

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@ -0,0 +1,49 @@
use riscv::register::{mie, mstatus};
fn vmim_write(val: usize) {
unsafe {
asm!("csrw {csr}, {rs}", rs = in(reg) val, csr = const 0xBC0);
}
}
fn vmim_read() -> usize {
let r: usize;
unsafe {
asm!("csrr {rd}, {csr}", rd = out(reg) r, csr = const 0xBC0);
}
r
}
fn vmip_read() -> usize {
let r: usize;
unsafe {
asm!("csrr {rd}, {csr}", rd = out(reg) r, csr = const 0xFC0);
}
r
}
pub fn enable_interrupts() {
unsafe {
mstatus::set_mie();
mie::set_mext();
}
}
pub fn disable_interrupts() {
unsafe {
mstatus::clear_mie();
mie::clear_mext();
}
}
pub fn enable(id: u32) {
vmim_write(vmim_read() | (1 << id));
}
pub fn disable(id: u32) {
vmim_write(vmim_read() & !(1 << id));
}
pub fn is_pending(id: u32) -> bool {
(vmip_read() >> id) & 1 == 1
}

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@ -1,3 +1,4 @@
pub mod cache;
pub mod boot;
pub mod irq;
pub mod pmp;