forked from M-Labs/artiq
firmware: Fix Kasli v2 runtime rtio_clock selection
SI5324_EXT_REF now only controls the (deprecated) fallbacks for when the rtio_clock option is not set.
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696418c2a9
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@ -214,8 +214,11 @@ pub fn bypass(input: Input) -> Result<()> {
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Ok(())
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}
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pub fn setup(settings: &FrequencySettings, input: Input) -> Result<()> {
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pub fn setup(settings: &FrequencySettings, ext_input: Input) -> Result<()> {
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let s = map_frequency_settings(settings)?;
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// FREE_RUN=1 routes XA/XB to CKIN2.
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let input = if settings.crystal_ref { Input::Ckin2 } else { ext_input };
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let cksel_reg = match input {
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Input::Ckin1 => 0b00,
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Input::Ckin2 => 0b01,
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@ -212,9 +212,8 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
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}
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}
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};
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#[cfg(all(soc_platform = "kasli", hw_rev = "v2.0", not(si5324_ext_ref)))]
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let si5324_ref_input = si5324::Input::Ckin2;
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#[cfg(all(soc_platform = "kasli", hw_rev = "v2.0", si5324_ext_ref))]
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#[cfg(all(soc_platform = "kasli", hw_rev = "v2.0"))]
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let si5324_ref_input = si5324::Input::Ckin1;
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#[cfg(all(soc_platform = "kasli", not(hw_rev = "v2.0")))]
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let si5324_ref_input = si5324::Input::Ckin2;
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@ -222,6 +221,7 @@ fn setup_si5324_as_synthesizer(cfg: RtioClock) {
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let si5324_ref_input = si5324::Input::Ckin2;
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#[cfg(soc_platform = "kc705")]
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let si5324_ref_input = si5324::Input::Ckin2;
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si5324::setup(&si5324_settings, si5324_ref_input).expect("cannot initialize Si5324");
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}
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