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kasli: add Error LED to MasterBase and SatelliteBase

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cc78078 2022-08-11 15:06:58 +08:00 committed by Sebastien Bourdeauducq
parent ad37be40c7
commit 004e7e7461
1 changed files with 6 additions and 0 deletions
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6
artiq/gateware/targets/kasli.py
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@ -310,6 +310,9 @@ class MasterBase(MiniSoC, AMPSoC):
platform = self.platform platform = self.platform
if platform.hw_rev == "v2.0": if platform.hw_rev == "v2.0":
self.submodules.error_led = gpio.GPIOOut(Cat(
self.platform.request("error_led")))
self.csr_devices.append("error_led")
self.submodules += SMAClkinForward(platform) self.submodules += SMAClkinForward(platform)
i2c = self.platform.request("i2c") i2c = self.platform.request("i2c")
@ -484,6 +487,9 @@ class SatelliteBase(BaseSoC):
disable_cdr_clk_ibuf = Signal(reset=1) disable_cdr_clk_ibuf = Signal(reset=1)
disable_cdr_clk_ibuf.attr.add("no_retiming") disable_cdr_clk_ibuf.attr.add("no_retiming")
if self.platform.hw_rev == "v2.0": if self.platform.hw_rev == "v2.0":
self.submodules.error_led = gpio.GPIOOut(Cat(
self.platform.request("error_led")))
self.csr_devices.append("error_led")
cdr_clk_clean = self.platform.request("cdr_clk_clean") cdr_clk_clean = self.platform.request("cdr_clk_clean")
else: else:
cdr_clk_clean = self.platform.request("si5324_clkout") cdr_clk_clean = self.platform.request("si5324_clkout")