2016-03-05 00:17:41 +08:00
|
|
|
from artiq.language.core import syscall, kernel
|
2016-03-05 00:43:13 +08:00
|
|
|
from artiq.language.types import TBool, TInt32, TNone
|
2016-03-05 00:17:41 +08:00
|
|
|
from artiq.coredevice.exceptions import I2CError
|
|
|
|
|
|
|
|
|
|
|
|
@syscall
|
|
|
|
def i2c_init(busno: TInt32) -> TNone:
|
|
|
|
raise NotImplementedError("syscall not simulated")
|
|
|
|
|
|
|
|
|
|
|
|
@syscall
|
|
|
|
def i2c_start(busno: TInt32) -> TNone:
|
|
|
|
raise NotImplementedError("syscall not simulated")
|
|
|
|
|
|
|
|
|
|
|
|
@syscall
|
|
|
|
def i2c_stop(busno: TInt32) -> TNone:
|
|
|
|
raise NotImplementedError("syscall not simulated")
|
|
|
|
|
|
|
|
|
|
|
|
@syscall
|
|
|
|
def i2c_write(busno: TInt32, b: TInt32) -> TBool:
|
|
|
|
raise NotImplementedError("syscall not simulated")
|
|
|
|
|
|
|
|
|
|
|
|
@syscall
|
|
|
|
def i2c_read(busno: TInt32, ack: TBool) -> TInt32:
|
|
|
|
raise NotImplementedError("syscall not simulated")
|
|
|
|
|
|
|
|
|
|
|
|
class PCA9548:
|
2016-03-05 00:47:24 +08:00
|
|
|
def __init__(self, dmgr, busno=0, address=0xe8):
|
2016-03-05 00:17:41 +08:00
|
|
|
self.core = dmgr.get("core")
|
|
|
|
self.busno = busno
|
|
|
|
self.address = address
|
|
|
|
|
|
|
|
@kernel
|
|
|
|
def set(self, channel):
|
|
|
|
i2c_init(self.busno)
|
|
|
|
i2c_start(self.busno)
|
|
|
|
try:
|
|
|
|
if not i2c_write(self.busno, self.address):
|
|
|
|
raise I2CError("PCA9548 failed to ack address")
|
|
|
|
if not i2c_write(self.busno, 1 << channel):
|
|
|
|
raise I2CError("PCA9548 failed to ack control word")
|
|
|
|
finally:
|
|
|
|
i2c_stop(self.busno)
|
|
|
|
|
2016-03-05 19:01:35 +08:00
|
|
|
@kernel
|
|
|
|
def readback(self):
|
|
|
|
i2c_init(self.busno)
|
|
|
|
i2c_start(self.busno)
|
|
|
|
r = 0
|
|
|
|
try:
|
|
|
|
if not i2c_write(self.busno, self.address | 1):
|
|
|
|
raise I2CError("PCA9548 failed to ack address")
|
|
|
|
r = i2c_read(self.busno, False)
|
|
|
|
finally:
|
|
|
|
i2c_stop(self.busno)
|
|
|
|
return r
|
|
|
|
|
2016-03-05 00:17:41 +08:00
|
|
|
|
|
|
|
class TCA6424A:
|
|
|
|
def __init__(self, dmgr, busno=0, address=0x44):
|
|
|
|
self.core = dmgr.get("core")
|
|
|
|
self.busno = busno
|
|
|
|
self.address = address
|
|
|
|
|
|
|
|
@kernel
|
|
|
|
def _write24(self, command, value):
|
|
|
|
i2c_init(self.busno)
|
|
|
|
i2c_start(self.busno)
|
|
|
|
try:
|
|
|
|
if not i2c_write(self.busno, self.address):
|
|
|
|
raise I2CError("TCA6424A failed to ack address")
|
|
|
|
if not i2c_write(self.busno, command):
|
|
|
|
raise I2CError("TCA6424A failed to ack command")
|
|
|
|
for i in range(3):
|
|
|
|
if not i2c_write(self.busno, value >> 16):
|
2016-03-05 00:51:13 +08:00
|
|
|
raise I2CError("TCA6424A failed to ack data")
|
2016-03-05 00:17:41 +08:00
|
|
|
value <<= 8
|
|
|
|
finally:
|
|
|
|
i2c_stop(self.busno)
|
|
|
|
|
|
|
|
@kernel
|
|
|
|
def set(self, outputs):
|
|
|
|
self._write24(0x8c, 0) # set all directions to output
|
|
|
|
self._write24(0x84, output) # set levels
|