forked from M-Labs/artiq-zynq
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0c3474f5b5 | |
 Simon Renblad
|
873dd86b4d | |
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Simon Renblad
|
e7614d2e8e | |
|
Simon Renblad
|
491e426222 | |
|
Simon Renblad
|
ccd3bf3003 | |
 Sebastien Bourdeauducq
|
3fdb7e80a8 | |
 abdul124
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bd1de933fb | |
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abdul124
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e8d77fca3e | |
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abdul124
|
85e8a3fc44 | |
|
Sebastien Bourdeauducq
|
04078b3d89 | |
|
abdul124
|
d508c5c6f8 | |
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abdul124
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bae41253e4 | |
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abdul124
|
20181e9915 | |
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abdul124
|
a835149619 | |
|
Sebastien Bourdeauducq
|
78d6b7ddcf | |
|
Simon Renblad
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fad1db9796 | |
|
Simon Renblad
|
fee30033ec | |
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abdul124
|
fe6f259d48 |
21
flake.lock
21
flake.lock
|
|
@ -11,11 +11,11 @@
|
|||
"src-pythonparser": "src-pythonparser"
|
||||
},
|
||||
"locked": {
|
||||
"lastModified": 1722417433,
|
||||
"narHash": "sha256-QEbcVdL1sUQEbMCvCUvPM8DKqwOth3gJpdiLTf4hPN8=",
|
||||
"lastModified": 1724411572,
|
||||
"narHash": "sha256-33vj/pJ9iaVvaFP8uuBKMSQPN20mRlCbeBkTCNc9WB4=",
|
||||
"ref": "refs/heads/master",
|
||||
"rev": "0623480c82c28d57e14dc4f363374758a52284d3",
|
||||
"revCount": 8952,
|
||||
"rev": "352cf907ee67f7db5478fe23217cd5fcb7334617",
|
||||
"revCount": 8996,
|
||||
"type": "git",
|
||||
"url": "https://github.com/m-labs/artiq.git"
|
||||
},
|
||||
|
|
@ -102,11 +102,11 @@
|
|||
},
|
||||
"nixpkgs": {
|
||||
"locked": {
|
||||
"lastModified": 1721924956,
|
||||
"narHash": "sha256-Sb1jlyRO+N8jBXEX9Pg9Z1Qb8Bw9QyOgLDNMEpmjZ2M=",
|
||||
"lastModified": 1723362943,
|
||||
"narHash": "sha256-dFZRVSgmJkyM0bkPpaYRtG/kRMRTorUIDj8BxoOt1T4=",
|
||||
"owner": "NixOS",
|
||||
"repo": "nixpkgs",
|
||||
"rev": "5ad6a14c6bf098e98800b091668718c336effc95",
|
||||
"rev": "a58bc8ad779655e790115244571758e8de055e3d",
|
||||
"type": "github"
|
||||
},
|
||||
"original": {
|
||||
|
|
@ -131,15 +131,16 @@
|
|||
]
|
||||
},
|
||||
"locked": {
|
||||
"lastModified": 1722046723,
|
||||
"narHash": "sha256-G7/gHz8ORRvHd1/RIURrdcswKRPe9K0FsIYR4v5jSWo=",
|
||||
"lastModified": 1719454714,
|
||||
"narHash": "sha256-MojqG0lyUINkEk0b3kM2drsU5vyaF8DFZe/FAlZVOGs=",
|
||||
"owner": "oxalica",
|
||||
"repo": "rust-overlay",
|
||||
"rev": "56baac5e6b2743d4730e664ea64f6d8a2aad0fbb",
|
||||
"rev": "d1c527659cf076ecc4b96a91c702d080b213801e",
|
||||
"type": "github"
|
||||
},
|
||||
"original": {
|
||||
"owner": "oxalica",
|
||||
"ref": "snapshot/2024-08-01",
|
||||
"repo": "rust-overlay",
|
||||
"type": "github"
|
||||
}
|
||||
|
|
|
|||
|
|
@ -2,6 +2,15 @@
|
|||
# It is not intended for manual editing.
|
||||
version = 3
|
||||
|
||||
[[package]]
|
||||
name = "approx"
|
||||
version = "0.5.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "cab112f0a86d568ea0e627cc1d6be74a1e9cd55214684db5561995f6dad897c6"
|
||||
dependencies = [
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "arrayvec"
|
||||
version = "0.7.4"
|
||||
|
|
@ -246,10 +255,10 @@ dependencies = [
|
|||
"libsupport_zynq",
|
||||
"log",
|
||||
"log_buffer",
|
||||
"nalgebra",
|
||||
"nb 0.1.3",
|
||||
"unwind",
|
||||
"vcell",
|
||||
"nalgebra",
|
||||
"void",
|
||||
]
|
||||
|
||||
|
|
@ -383,6 +392,19 @@ version = "0.7.2"
|
|||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "c75de51135344a4f8ed3cfe2720dc27736f7711989703a0b43aadf3753c55577"
|
||||
|
||||
[[package]]
|
||||
name = "nalgebra"
|
||||
version = "0.32.6"
|
||||
source = "git+https://git.m-labs.hk/M-Labs/nalgebra.git?rev=dd00f9b#dd00f9b46046e0b931d1b470166db02fd29591be"
|
||||
dependencies = [
|
||||
"approx",
|
||||
"num-complex",
|
||||
"num-rational",
|
||||
"num-traits",
|
||||
"simba",
|
||||
"typenum",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "nb"
|
||||
version = "0.1.3"
|
||||
|
|
@ -398,6 +420,15 @@ version = "1.0.0"
|
|||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "546c37ac5d9e56f55e73b677106873d9d9f5190605e41a856503623648488cae"
|
||||
|
||||
[[package]]
|
||||
name = "num-complex"
|
||||
version = "0.4.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "26873667bbbb7c5182d4a37c1add32cdf09f841af72da53318fdb81543c15085"
|
||||
dependencies = [
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "num-derive"
|
||||
version = "0.3.3"
|
||||
|
|
@ -409,6 +440,26 @@ dependencies = [
|
|||
"syn",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "num-integer"
|
||||
version = "0.1.46"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "7969661fd2958a5cb096e56c8e1ad0444ac2bbcd0061bd28660485a44879858f"
|
||||
dependencies = [
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "num-rational"
|
||||
version = "0.4.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "d41702bd167c2df5520b384281bc111a4b5efcf7fbc4c9c222c815b07e0a6a6a"
|
||||
dependencies = [
|
||||
"autocfg",
|
||||
"num-integer",
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "num-traits"
|
||||
version = "0.2.15"
|
||||
|
|
@ -416,8 +467,15 @@ source = "registry+https://github.com/rust-lang/crates.io-index"
|
|||
checksum = "578ede34cf02f8924ab9447f50c28075b4d3e5b269972345e7e0372b38c6cdcd"
|
||||
dependencies = [
|
||||
"autocfg",
|
||||
"libm",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "paste"
|
||||
version = "1.0.15"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a"
|
||||
|
||||
[[package]]
|
||||
name = "pin-project-lite"
|
||||
version = "0.2.9"
|
||||
|
|
@ -501,7 +559,9 @@ name = "satman"
|
|||
version = "0.0.0"
|
||||
dependencies = [
|
||||
"build_zynq",
|
||||
"byteorder",
|
||||
"core_io",
|
||||
"crc",
|
||||
"cslice",
|
||||
"embedded-hal",
|
||||
"io",
|
||||
|
|
@ -524,6 +584,18 @@ version = "0.1.20"
|
|||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "d4f410fedcf71af0345d7607d246e7ad15faaadd49d240ee3b24e5dc21a820ac"
|
||||
|
||||
[[package]]
|
||||
name = "simba"
|
||||
version = "0.8.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "50582927ed6f77e4ac020c057f37a268fc6aebc29225050365aacbb9deeeddc4"
|
||||
dependencies = [
|
||||
"approx",
|
||||
"num-complex",
|
||||
"num-traits",
|
||||
"paste",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "smoltcp"
|
||||
version = "0.7.5"
|
||||
|
|
@ -556,6 +628,12 @@ dependencies = [
|
|||
"log",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "typenum"
|
||||
version = "1.17.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825"
|
||||
|
||||
[[package]]
|
||||
name = "unicode-ident"
|
||||
version = "1.0.5"
|
||||
|
|
@ -572,147 +650,6 @@ dependencies = [
|
|||
"libc",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "nalgebra"
|
||||
version = "0.32.6"
|
||||
source = "git+https://git.m-labs.hk/M-labs/nalgebra?rev=dd00f9b#dd00f9b46046e0b931d1b470166db02fd29591be"
|
||||
dependencies = [
|
||||
"approx",
|
||||
"matrixmultiply",
|
||||
"nalgebra-macros",
|
||||
"num-complex",
|
||||
"num-rational",
|
||||
"num-traits",
|
||||
"simba",
|
||||
"typenum",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "approx"
|
||||
version = "0.5.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "cab112f0a86d568ea0e627cc1d6be74a1e9cd55214684db5561995f6dad897c6"
|
||||
dependencies = [
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "matrixmultiply"
|
||||
version = "0.3.8"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "7574c1cf36da4798ab73da5b215bbf444f50718207754cb522201d78d1cd0ff2"
|
||||
dependencies = [
|
||||
"autocfg",
|
||||
"rawpointer",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "nalgebra-macros"
|
||||
version = "0.2.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "91761aed67d03ad966ef783ae962ef9bbaca728d2dd7ceb7939ec110fffad998"
|
||||
dependencies = [
|
||||
"proc-macro2",
|
||||
"quote",
|
||||
"syn",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "num-complex"
|
||||
version = "0.4.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "26873667bbbb7c5182d4a37c1add32cdf09f841af72da53318fdb81543c15085"
|
||||
dependencies = [
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "num-rational"
|
||||
version = "0.4.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "d41702bd167c2df5520b384281bc111a4b5efcf7fbc4c9c222c815b07e0a6a6a"
|
||||
dependencies = [
|
||||
"num-bigint",
|
||||
"num-integer",
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "simba"
|
||||
version = "0.8.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "50582927ed6f77e4ac020c057f37a268fc6aebc29225050365aacbb9deeeddc4"
|
||||
dependencies = [
|
||||
"approx",
|
||||
"num-complex",
|
||||
"num-traits",
|
||||
"paste",
|
||||
"wide",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "typenum"
|
||||
version = "1.17.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "42ff0bf0c66b8238c6f3b578df37d0b7848e55df8577b3f74f92a69acceeb825"
|
||||
|
||||
[[package]]
|
||||
name = "rawpointer"
|
||||
version = "0.2.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "60a357793950651c4ed0f3f52338f53b2f809f32d83a07f72909fa13e4c6c1e3"
|
||||
|
||||
[[package]]
|
||||
name = "num-bigint"
|
||||
version = "0.4.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "4e0d047c1062aa51e256408c560894e5251f08925980e53cf1aa5bd00eec6512"
|
||||
dependencies = [
|
||||
"num-integer",
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "num-integer"
|
||||
version = "0.1.46"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "7969661fd2958a5cb096e56c8e1ad0444ac2bbcd0061bd28660485a44879858f"
|
||||
dependencies = [
|
||||
"num-traits",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "paste"
|
||||
version = "1.0.15"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "57c0d7b74b563b49d38dae00a0c37d4d6de9b432382b2892f0574ddcae73fd0a"
|
||||
|
||||
[[package]]
|
||||
name = "wide"
|
||||
version = "0.7.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "cd89cf484471f953ee84f07c0dff0ea20e9ddf976f03cabdf5dda48b221f22e7"
|
||||
features = ["no_std"]
|
||||
dependencies = [
|
||||
"bytemuck",
|
||||
"safe_arch",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "bytemuck"
|
||||
version = "1.16.1"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "b236fc92302c97ed75b38da1f4917b5cdda4984745740f153a5d3059e48d725e"
|
||||
|
||||
[[package]]
|
||||
name = "safe_arch"
|
||||
version = "0.6.0"
|
||||
source = "registry+https://github.com/rust-lang/crates.io-index"
|
||||
checksum = "794821e4ccb0d9f979512f9c1973480123f9bd62a90d74ab0f9426fcf8f4a529"
|
||||
dependencies = [
|
||||
"bytemuck",
|
||||
]
|
||||
|
||||
[[package]]
|
||||
name = "vcell"
|
||||
version = "0.1.3"
|
||||
|
|
|
|||
|
|
@ -287,6 +287,73 @@ pub enum Packet {
|
|||
SubkernelMessageAck {
|
||||
destination: u8,
|
||||
},
|
||||
|
||||
CoreMgmtGetLogRequest {
|
||||
destination: u8,
|
||||
clear: bool,
|
||||
},
|
||||
CoreMgmtClearLogRequest {
|
||||
destination: u8,
|
||||
},
|
||||
CoreMgmtSetLogLevelRequest {
|
||||
destination: u8,
|
||||
log_level: u8,
|
||||
},
|
||||
CoreMgmtSetUartLogLevelRequest {
|
||||
destination: u8,
|
||||
log_level: u8,
|
||||
},
|
||||
CoreMgmtConfigReadRequest {
|
||||
destination: u8,
|
||||
length: u16,
|
||||
key: [u8; MASTER_PAYLOAD_MAX_SIZE],
|
||||
},
|
||||
CoreMgmtConfigReadContinue {
|
||||
destination: u8,
|
||||
},
|
||||
CoreMgmtConfigWriteRequest {
|
||||
destination: u8,
|
||||
last: bool,
|
||||
length: u16,
|
||||
data: [u8; MASTER_PAYLOAD_MAX_SIZE],
|
||||
},
|
||||
CoreMgmtConfigRemoveRequest {
|
||||
destination: u8,
|
||||
length: u16,
|
||||
key: [u8; MASTER_PAYLOAD_MAX_SIZE],
|
||||
},
|
||||
CoreMgmtConfigEraseRequest {
|
||||
destination: u8,
|
||||
},
|
||||
CoreMgmtRebootRequest {
|
||||
destination: u8,
|
||||
},
|
||||
CoreMgmtAllocatorDebugRequest {
|
||||
destination: u8,
|
||||
},
|
||||
CoreMgmtFlashRequest {
|
||||
destination: u8,
|
||||
last: bool,
|
||||
length: u16,
|
||||
data: [u8; MASTER_PAYLOAD_MAX_SIZE],
|
||||
},
|
||||
CoreMgmtDropLinkAck {
|
||||
destination: u8,
|
||||
},
|
||||
CoreMgmtDropLink,
|
||||
CoreMgmtGetLogReply {
|
||||
last: bool,
|
||||
length: u16,
|
||||
data: [u8; SAT_PAYLOAD_MAX_SIZE],
|
||||
},
|
||||
CoreMgmtConfigReadReply {
|
||||
last: bool,
|
||||
length: u16,
|
||||
value: [u8; SAT_PAYLOAD_MAX_SIZE],
|
||||
},
|
||||
CoreMgmtReply {
|
||||
succeeded: bool,
|
||||
},
|
||||
}
|
||||
|
||||
impl Packet {
|
||||
|
|
@ -563,6 +630,111 @@ impl Packet {
|
|||
destination: reader.read_u8()?,
|
||||
},
|
||||
|
||||
0xd0 => Packet::CoreMgmtGetLogRequest {
|
||||
destination: reader.read_u8()?,
|
||||
clear: reader.read_bool()?,
|
||||
},
|
||||
0xd1 => Packet::CoreMgmtClearLogRequest {
|
||||
destination: reader.read_u8()?,
|
||||
},
|
||||
0xd2 => Packet::CoreMgmtSetLogLevelRequest {
|
||||
destination: reader.read_u8()?,
|
||||
log_level: reader.read_u8()?,
|
||||
},
|
||||
0xd3 => Packet::CoreMgmtSetUartLogLevelRequest {
|
||||
destination: reader.read_u8()?,
|
||||
log_level: reader.read_u8()?,
|
||||
},
|
||||
0xd4 => {
|
||||
let destination = reader.read_u8()?;
|
||||
let length = reader.read_u16()?;
|
||||
let mut key: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
|
||||
reader.read_exact(&mut key[0..length as usize])?;
|
||||
Packet::CoreMgmtConfigReadRequest {
|
||||
destination: destination,
|
||||
length: length,
|
||||
key: key,
|
||||
}
|
||||
}
|
||||
0xd5 => Packet::CoreMgmtConfigReadContinue {
|
||||
destination: reader.read_u8()?,
|
||||
},
|
||||
0xd6 => {
|
||||
let destination = reader.read_u8()?;
|
||||
let last = reader.read_bool()?;
|
||||
let length = reader.read_u16()?;
|
||||
let mut data: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
|
||||
reader.read_exact(&mut data[0..length as usize])?;
|
||||
Packet::CoreMgmtConfigWriteRequest {
|
||||
destination: destination,
|
||||
last: last,
|
||||
length: length,
|
||||
data: data,
|
||||
}
|
||||
}
|
||||
0xd7 => {
|
||||
let destination = reader.read_u8()?;
|
||||
let length = reader.read_u16()?;
|
||||
let mut key: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
|
||||
reader.read_exact(&mut key[0..length as usize])?;
|
||||
Packet::CoreMgmtConfigRemoveRequest {
|
||||
destination: destination,
|
||||
length: length,
|
||||
key: key,
|
||||
}
|
||||
}
|
||||
0xd8 => Packet::CoreMgmtConfigEraseRequest {
|
||||
destination: reader.read_u8()?,
|
||||
},
|
||||
0xd9 => Packet::CoreMgmtRebootRequest {
|
||||
destination: reader.read_u8()?,
|
||||
},
|
||||
0xda => Packet::CoreMgmtAllocatorDebugRequest {
|
||||
destination: reader.read_u8()?,
|
||||
},
|
||||
0xdb => {
|
||||
let destination = reader.read_u8()?;
|
||||
let last = reader.read_bool()?;
|
||||
let length = reader.read_u16()?;
|
||||
let mut data: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
|
||||
reader.read_exact(&mut data[0..length as usize])?;
|
||||
Packet::CoreMgmtFlashRequest {
|
||||
destination: destination,
|
||||
last: last,
|
||||
length: length,
|
||||
data: data,
|
||||
}
|
||||
}
|
||||
0xdc => Packet::CoreMgmtDropLinkAck {
|
||||
destination: reader.read_u8()?,
|
||||
},
|
||||
0xdd => Packet::CoreMgmtDropLink,
|
||||
0xde => {
|
||||
let last = reader.read_bool()?;
|
||||
let length = reader.read_u16()?;
|
||||
let mut data: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
|
||||
reader.read_exact(&mut data[0..length as usize])?;
|
||||
Packet::CoreMgmtGetLogReply {
|
||||
last: last,
|
||||
length: length,
|
||||
data: data,
|
||||
}
|
||||
}
|
||||
0xdf => {
|
||||
let last = reader.read_bool()?;
|
||||
let length = reader.read_u16()?;
|
||||
let mut value: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
|
||||
reader.read_exact(&mut value[0..length as usize])?;
|
||||
Packet::CoreMgmtConfigReadReply {
|
||||
last: last,
|
||||
length: length,
|
||||
value: value,
|
||||
}
|
||||
}
|
||||
0xe0 => Packet::CoreMgmtReply {
|
||||
succeeded: reader.read_bool()?,
|
||||
},
|
||||
|
||||
ty => return Err(Error::UnknownPacket(ty)),
|
||||
})
|
||||
}
|
||||
|
|
@ -938,6 +1110,107 @@ impl Packet {
|
|||
writer.write_u8(0xcc)?;
|
||||
writer.write_u8(destination)?;
|
||||
}
|
||||
|
||||
Packet::CoreMgmtGetLogRequest { destination, clear } => {
|
||||
writer.write_u8(0xd0)?;
|
||||
writer.write_u8(destination)?;
|
||||
writer.write_bool(clear)?;
|
||||
}
|
||||
Packet::CoreMgmtClearLogRequest { destination } => {
|
||||
writer.write_u8(0xd1)?;
|
||||
writer.write_u8(destination)?;
|
||||
}
|
||||
Packet::CoreMgmtSetLogLevelRequest { destination, log_level } => {
|
||||
writer.write_u8(0xd2)?;
|
||||
writer.write_u8(destination)?;
|
||||
writer.write_u8(log_level)?;
|
||||
}
|
||||
Packet::CoreMgmtSetUartLogLevelRequest { destination, log_level } => {
|
||||
writer.write_u8(0xd3)?;
|
||||
writer.write_u8(destination)?;
|
||||
writer.write_u8(log_level)?;
|
||||
}
|
||||
Packet::CoreMgmtConfigReadRequest {
|
||||
destination,
|
||||
length,
|
||||
key,
|
||||
} => {
|
||||
writer.write_u8(0xd4)?;
|
||||
writer.write_u8(destination)?;
|
||||
writer.write_u16(length)?;
|
||||
writer.write_all(&key[0..length as usize])?;
|
||||
}
|
||||
Packet::CoreMgmtConfigReadContinue { destination } => {
|
||||
writer.write_u8(0xd5)?;
|
||||
writer.write_u8(destination)?;
|
||||
}
|
||||
Packet::CoreMgmtConfigWriteRequest {
|
||||
destination,
|
||||
last,
|
||||
length,
|
||||
data,
|
||||
} => {
|
||||
writer.write_u8(0xd6)?;
|
||||
writer.write_u8(destination)?;
|
||||
writer.write_bool(last)?;
|
||||
writer.write_u16(length)?;
|
||||
writer.write_all(&data[0..length as usize])?;
|
||||
}
|
||||
Packet::CoreMgmtConfigRemoveRequest {
|
||||
destination,
|
||||
length,
|
||||
key,
|
||||
} => {
|
||||
writer.write_u8(0xd7)?;
|
||||
writer.write_u8(destination)?;
|
||||
writer.write_u16(length)?;
|
||||
writer.write_all(&key[0..length as usize])?;
|
||||
}
|
||||
Packet::CoreMgmtConfigEraseRequest { destination } => {
|
||||
writer.write_u8(0xd8)?;
|
||||
writer.write_u8(destination)?;
|
||||
}
|
||||
Packet::CoreMgmtRebootRequest { destination } => {
|
||||
writer.write_u8(0xd9)?;
|
||||
writer.write_u8(destination)?;
|
||||
}
|
||||
Packet::CoreMgmtAllocatorDebugRequest { destination } => {
|
||||
writer.write_u8(0xda)?;
|
||||
writer.write_u8(destination)?;
|
||||
}
|
||||
Packet::CoreMgmtFlashRequest {
|
||||
destination,
|
||||
last,
|
||||
length,
|
||||
data,
|
||||
} => {
|
||||
writer.write_u8(0xdb)?;
|
||||
writer.write_u8(destination)?;
|
||||
writer.write_bool(last)?;
|
||||
writer.write_u16(length)?;
|
||||
writer.write_all(&data[..length as usize])?;
|
||||
}
|
||||
Packet::CoreMgmtDropLinkAck { destination } => {
|
||||
writer.write_u8(0xdc)?;
|
||||
writer.write_u8(destination)?;
|
||||
}
|
||||
Packet::CoreMgmtDropLink => writer.write_u8(0xdd)?,
|
||||
Packet::CoreMgmtGetLogReply { last, length, data } => {
|
||||
writer.write_u8(0xde)?;
|
||||
writer.write_bool(last)?;
|
||||
writer.write_u16(length)?;
|
||||
writer.write_all(&data[0..length as usize])?;
|
||||
}
|
||||
Packet::CoreMgmtConfigReadReply { last, length, value } => {
|
||||
writer.write_u8(0xdf)?;
|
||||
writer.write_bool(last)?;
|
||||
writer.write_u16(length)?;
|
||||
writer.write_all(&value[0..length as usize])?;
|
||||
}
|
||||
Packet::CoreMgmtReply { succeeded } => {
|
||||
writer.write_u8(0xe0)?;
|
||||
writer.write_bool(succeeded)?;
|
||||
}
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
|
@ -974,7 +1247,8 @@ impl Packet {
|
|||
| Packet::SubkernelLoadRunReply { .. }
|
||||
| Packet::SubkernelMessageAck { .. }
|
||||
| Packet::DmaPlaybackStatus { .. }
|
||||
| Packet::SubkernelFinished { .. } => false,
|
||||
| Packet::SubkernelFinished { .. }
|
||||
| Packet::CoreMgmtDropLinkAck { .. } => false,
|
||||
_ => true,
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -34,7 +34,7 @@ io = { path = "../libio" }
|
|||
libboard_artiq = { path = "../libboard_artiq" }
|
||||
|
||||
[dependencies.nalgebra]
|
||||
git = "https://git.m-labs.hk/M-labs/nalgebra.git"
|
||||
git = "https://git.m-labs.hk/M-Labs/nalgebra.git"
|
||||
rev = "dd00f9b"
|
||||
default-features = false
|
||||
features = ["libm", "alloc"]
|
||||
|
|
|
|||
|
|
@ -15,7 +15,7 @@
|
|||
use core::mem;
|
||||
|
||||
use core_io::Error as ReadError;
|
||||
use cslice::CSlice;
|
||||
use cslice::{AsCSlice, CSlice};
|
||||
use dwarf::eh::{self, EHAction, EHContext};
|
||||
use io::{Cursor, ProtoRead};
|
||||
use libc::{c_int, c_void, uintptr_t};
|
||||
|
|
@ -222,8 +222,6 @@ pub unsafe fn artiq_personality(
|
|||
}
|
||||
|
||||
pub unsafe extern "C" fn raise(exception: *const Exception) -> ! {
|
||||
use cslice::AsCSlice;
|
||||
|
||||
let count = EXCEPTION_BUFFER.exception_count;
|
||||
let stack = &mut EXCEPTION_BUFFER.exception_stack;
|
||||
let diff = exception as isize - EXCEPTION_BUFFER.exceptions.as_ptr() as isize;
|
||||
|
|
@ -477,20 +475,30 @@ extern "C" fn stop_fn(
|
|||
}
|
||||
}
|
||||
|
||||
// Must be kept in sync with preallocate_runtime_exception_names() in artiq/language/embedding_map.py
|
||||
static EXCEPTION_ID_LOOKUP: [(&str, u32); 12] = [
|
||||
("RuntimeError", 0),
|
||||
("RTIOUnderflow", 1),
|
||||
("RTIOOverflow", 2),
|
||||
("RTIODestinationUnreachable", 3),
|
||||
("DMAError", 4),
|
||||
("I2CError", 5),
|
||||
("CacheError", 6),
|
||||
("SPIError", 7),
|
||||
("ZeroDivisionError", 8),
|
||||
("IndexError", 9),
|
||||
("UnwrapNoneError", 10),
|
||||
("SubkernelError", 11),
|
||||
// Must be kept in sync with preallocate_runtime_exception_names() in `artiq.compiler.embedding`
|
||||
static EXCEPTION_ID_LOOKUP: [(&str, u32); 22] = [
|
||||
("RTIOUnderflow", 0),
|
||||
("RTIOOverflow", 1),
|
||||
("RTIODestinationUnreachable", 2),
|
||||
("DMAError", 3),
|
||||
("I2CError", 4),
|
||||
("CacheError", 5),
|
||||
("SPIError", 6),
|
||||
("SubkernelError", 7),
|
||||
("AssertionError", 8),
|
||||
("AttributeError", 9),
|
||||
("IndexError", 10),
|
||||
("IOError", 11),
|
||||
("KeyError", 12),
|
||||
("NotImplementedError", 13),
|
||||
("OverflowError", 14),
|
||||
("RuntimeError", 15),
|
||||
("TimeoutError", 16),
|
||||
("TypeError", 17),
|
||||
("ValueError", 18),
|
||||
("ZeroDivisionError", 19),
|
||||
("LinAlgError", 20),
|
||||
("UnwrapNoneError", 21),
|
||||
];
|
||||
|
||||
pub fn get_exception_id(name: &str) -> u32 {
|
||||
|
|
@ -525,3 +533,29 @@ macro_rules! artiq_raise {
|
|||
}};
|
||||
($name:expr, $message:expr) => {{ artiq_raise!($name, $message, 0, 0, 0) }};
|
||||
}
|
||||
|
||||
/// Takes as input exception id from host
|
||||
/// Generates a new exception with:
|
||||
/// * `id` set to `exn_id`
|
||||
/// * `message` set to corresponding exception name from `EXCEPTION_ID_LOOKUP`
|
||||
///
|
||||
/// The message is matched on host to ensure correct exception is being referred
|
||||
/// This test checks the synchronization of exception ids for runtime errors
|
||||
#[no_mangle]
|
||||
pub extern "C" fn test_exception_id_sync(exn_id: u32) {
|
||||
let message = EXCEPTION_ID_LOOKUP
|
||||
.iter()
|
||||
.find_map(|&(name, id)| if id == exn_id { Some(name) } else { None })
|
||||
.unwrap_or("unallocated internal exception id");
|
||||
|
||||
let exn = Exception {
|
||||
id: exn_id,
|
||||
file: file!().as_c_slice(),
|
||||
line: 0,
|
||||
column: 0,
|
||||
function: "test_exception_id_sync".as_c_slice(),
|
||||
message: message.as_c_slice(),
|
||||
param: [0, 0, 0],
|
||||
};
|
||||
unsafe { raise(&exn) };
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,16 +1,15 @@
|
|||
use alloc::vec;
|
||||
use core::{ffi::VaList, ptr, slice, str};
|
||||
use core::{ffi::VaList, ptr, str};
|
||||
|
||||
use libc::{c_char, c_int, size_t};
|
||||
use libm;
|
||||
use log::{info, warn};
|
||||
use nalgebra::{linalg, DMatrix};
|
||||
|
||||
#[cfg(has_drtio)]
|
||||
use super::subkernel;
|
||||
use super::{cache,
|
||||
core1::rtio_get_destination_status,
|
||||
dma,
|
||||
dma, linalg,
|
||||
rpc::{rpc_recv, rpc_send, rpc_send_async}};
|
||||
use crate::{eh_artiq, i2c, rtio};
|
||||
|
||||
|
|
@ -39,26 +38,6 @@ unsafe extern "C" fn rtio_log(fmt: *const c_char, mut args: ...) {
|
|||
rtio::write_log(buf.as_slice());
|
||||
}
|
||||
|
||||
unsafe extern "C" fn linalg_try_invert_to(dim0: usize, dim1: usize, data: *mut f64) -> i8 {
|
||||
let data_slice = unsafe { slice::from_raw_parts_mut(data, dim0 * dim1) };
|
||||
let matrix = DMatrix::from_row_slice(dim0, dim1, data_slice);
|
||||
let mut inverted_matrix = DMatrix::<f64>::zeros(dim0, dim1);
|
||||
|
||||
if linalg::try_invert_to(matrix, &mut inverted_matrix) {
|
||||
data_slice.copy_from_slice(inverted_matrix.transpose().as_slice());
|
||||
1
|
||||
} else {
|
||||
0
|
||||
}
|
||||
}
|
||||
|
||||
unsafe extern "C" fn linalg_wilkinson_shift(dim0: usize, dim1: usize, data: *mut f64) -> f64 {
|
||||
let data_slice = slice::from_raw_parts_mut(data, dim0 * dim1);
|
||||
let matrix = DMatrix::from_row_slice(dim0, dim1, data_slice);
|
||||
|
||||
linalg::wilkinson_shift(matrix[(0, 0)], matrix[(1, 1)], matrix[(0, 1)])
|
||||
}
|
||||
|
||||
macro_rules! api {
|
||||
($i:ident) => ({
|
||||
extern { static $i: u8; }
|
||||
|
|
@ -342,8 +321,24 @@ pub fn resolve(required: &[u8]) -> Option<u32> {
|
|||
},
|
||||
|
||||
// linalg
|
||||
api!(linalg_try_invert_to = linalg_try_invert_to),
|
||||
api!(linalg_wilkinson_shift = linalg_wilkinson_shift),
|
||||
api!(np_linalg_cholesky = linalg::np_linalg_cholesky),
|
||||
api!(np_linalg_qr = linalg::np_linalg_qr),
|
||||
api!(np_linalg_svd = linalg::np_linalg_svd),
|
||||
api!(np_linalg_inv = linalg::np_linalg_inv),
|
||||
api!(np_linalg_pinv = linalg::np_linalg_pinv),
|
||||
api!(np_linalg_matrix_power = linalg::np_linalg_matrix_power),
|
||||
api!(np_linalg_det = linalg::np_linalg_det),
|
||||
api!(sp_linalg_lu = linalg::sp_linalg_lu),
|
||||
api!(sp_linalg_schur = linalg::sp_linalg_schur),
|
||||
api!(sp_linalg_hessenberg = linalg::sp_linalg_hessenberg),
|
||||
|
||||
/*
|
||||
* syscall for unit tests
|
||||
* Used in `artiq.tests.coredevice.test_exceptions.ExceptionTest.test_raise_exceptions_kernel`
|
||||
* This syscall checks that the exception IDs used in the Python `EmbeddingMap` (in `artiq.language.embedding`)
|
||||
* match the `EXCEPTION_ID_LOOKUP` defined in the firmware (`libksupport::src::eh_artiq`)
|
||||
*/
|
||||
api!(test_exception_id_sync = eh_artiq::test_exception_id_sync)
|
||||
];
|
||||
api.iter()
|
||||
.find(|&&(exported, _)| exported.as_bytes() == required)
|
||||
|
|
|
|||
|
|
@ -0,0 +1,440 @@
|
|||
// Uses `nalgebra` crate to invoke `np_linalg` and `sp_linalg` functions
|
||||
// When converting between `nalgebra::Matrix` and `NDArray` following considerations are necessary
|
||||
//
|
||||
// * Both `nalgebra::Matrix` and `NDArray` require their content to be stored in row-major order
|
||||
// * `NDArray` data pointer can be directly read and converted to `nalgebra::Matrix` (row and column number must be known)
|
||||
// * `nalgebra::Matrix::as_slice` returns the content of matrix in column-major order and initial data needs to be transposed before storing it in `NDArray` data pointer
|
||||
|
||||
use alloc::vec::Vec;
|
||||
use core::slice;
|
||||
|
||||
use nalgebra::DMatrix;
|
||||
|
||||
use crate::artiq_raise;
|
||||
|
||||
pub struct InputMatrix {
|
||||
pub ndims: usize,
|
||||
pub dims: *const usize,
|
||||
pub data: *mut f64,
|
||||
}
|
||||
|
||||
impl InputMatrix {
|
||||
fn get_dims(&mut self) -> Vec<usize> {
|
||||
let dims = unsafe { slice::from_raw_parts(self.dims, self.ndims) };
|
||||
dims.to_vec()
|
||||
}
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn np_linalg_cholesky(mat1: *mut InputMatrix, out: *mut InputMatrix) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let out = out.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
|
||||
let dim1 = (*mat1).get_dims();
|
||||
if dim1[0] != dim1[1] {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"last 2 dimensions of the array must be square: {1} != {2}",
|
||||
0,
|
||||
dim1[0] as i64,
|
||||
dim1[1] as i64
|
||||
);
|
||||
}
|
||||
|
||||
let outdim = out.get_dims();
|
||||
let out_slice = slice::from_raw_parts_mut(out.data, outdim[0] * outdim[1]);
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
|
||||
let matrix1 = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
let result = matrix1.cholesky();
|
||||
match result {
|
||||
Some(res) => {
|
||||
out_slice.copy_from_slice(res.unpack().transpose().as_slice());
|
||||
}
|
||||
None => {
|
||||
artiq_raise!("LinAlgError", "Matrix is not positive definite");
|
||||
}
|
||||
};
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn np_linalg_qr(mat1: *mut InputMatrix, out_q: *mut InputMatrix, out_r: *mut InputMatrix) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let out_q = out_q.as_mut().unwrap();
|
||||
let out_r = out_r.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
|
||||
let dim1 = (*mat1).get_dims();
|
||||
let outq_dim = (*out_q).get_dims();
|
||||
let outr_dim = (*out_r).get_dims();
|
||||
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
let out_q_slice = slice::from_raw_parts_mut(out_q.data, outq_dim[0] * outq_dim[1]);
|
||||
let out_r_slice = slice::from_raw_parts_mut(out_r.data, outr_dim[0] * outr_dim[1]);
|
||||
|
||||
// Refer to https://github.com/dimforge/nalgebra/issues/735
|
||||
let matrix1 = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
|
||||
let res = matrix1.qr();
|
||||
let (q, r) = res.unpack();
|
||||
|
||||
// Uses different algo need to match numpy
|
||||
out_q_slice.copy_from_slice(q.transpose().as_slice());
|
||||
out_r_slice.copy_from_slice(r.transpose().as_slice());
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn np_linalg_svd(
|
||||
mat1: *mut InputMatrix,
|
||||
outu: *mut InputMatrix,
|
||||
outs: *mut InputMatrix,
|
||||
outvh: *mut InputMatrix,
|
||||
) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let outu = outu.as_mut().unwrap();
|
||||
let outs = outs.as_mut().unwrap();
|
||||
let outvh = outvh.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
|
||||
let dim1 = (*mat1).get_dims();
|
||||
let outu_dim = (*outu).get_dims();
|
||||
let outs_dim = (*outs).get_dims();
|
||||
let outvh_dim = (*outvh).get_dims();
|
||||
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
let out_u_slice = slice::from_raw_parts_mut(outu.data, outu_dim[0] * outu_dim[1]);
|
||||
let out_s_slice = slice::from_raw_parts_mut(outs.data, outs_dim[0]);
|
||||
let out_vh_slice = slice::from_raw_parts_mut(outvh.data, outvh_dim[0] * outvh_dim[1]);
|
||||
|
||||
let matrix = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
let result = matrix.svd(true, true);
|
||||
out_u_slice.copy_from_slice(result.u.unwrap().transpose().as_slice());
|
||||
out_s_slice.copy_from_slice(result.singular_values.as_slice());
|
||||
out_vh_slice.copy_from_slice(result.v_t.unwrap().transpose().as_slice());
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn np_linalg_inv(mat1: *mut InputMatrix, out: *mut InputMatrix) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let out = out.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
let dim1 = (*mat1).get_dims();
|
||||
|
||||
if dim1[0] != dim1[1] {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"last 2 dimensions of the array must be square: {1} != {2}",
|
||||
0,
|
||||
dim1[0] as i64,
|
||||
dim1[1] as i64
|
||||
);
|
||||
}
|
||||
|
||||
let outdim = out.get_dims();
|
||||
let out_slice = slice::from_raw_parts_mut(out.data, outdim[0] * outdim[1]);
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
|
||||
let matrix = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
if !matrix.is_invertible() {
|
||||
artiq_raise!("LinAlgError", "no inverse for Singular Matrix");
|
||||
}
|
||||
let inv = matrix.try_inverse().unwrap();
|
||||
out_slice.copy_from_slice(inv.transpose().as_slice());
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn np_linalg_pinv(mat1: *mut InputMatrix, out: *mut InputMatrix) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let out = out.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
let dim1 = (*mat1).get_dims();
|
||||
let outdim = out.get_dims();
|
||||
let out_slice = slice::from_raw_parts_mut(out.data, outdim[0] * outdim[1]);
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
|
||||
let matrix = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
let svd = matrix.svd(true, true);
|
||||
let inv = svd.pseudo_inverse(1e-15);
|
||||
|
||||
match inv {
|
||||
Ok(m) => {
|
||||
out_slice.copy_from_slice(m.transpose().as_slice());
|
||||
}
|
||||
Err(_) => {
|
||||
artiq_raise!("LinAlgError", "SVD computation does not converge");
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn np_linalg_matrix_power(mat1: *mut InputMatrix, mat2: *mut InputMatrix, out: *mut InputMatrix) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let mat2 = mat2.as_mut().unwrap();
|
||||
let out = out.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
|
||||
let dim1 = (*mat1).get_dims();
|
||||
let power = slice::from_raw_parts_mut(mat2.data, 1);
|
||||
let power = power[0];
|
||||
let outdim = out.get_dims();
|
||||
let out_slice = slice::from_raw_parts_mut(out.data, outdim[0] * outdim[1]);
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
let mut abs_power = power;
|
||||
if abs_power < 0.0 {
|
||||
abs_power = abs_power * -1.0;
|
||||
}
|
||||
let matrix1 = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
if !matrix1.is_square() {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"last 2 dimensions of the array must be square: {1} != {2}",
|
||||
0,
|
||||
dim1[0] as i64,
|
||||
dim1[1] as i64
|
||||
);
|
||||
}
|
||||
let mut result = matrix1.pow(abs_power as u32);
|
||||
|
||||
if power < 0.0 {
|
||||
if !matrix1.is_invertible() {
|
||||
artiq_raise!("LinAlgError", "no inverse for Singular Matrix");
|
||||
}
|
||||
result = result.try_inverse().unwrap();
|
||||
}
|
||||
out_slice.copy_from_slice(result.transpose().as_slice());
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn np_linalg_det(mat1: *mut InputMatrix, out: *mut InputMatrix) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let out = out.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
let dim1 = (*mat1).get_dims();
|
||||
let out_slice = slice::from_raw_parts_mut(out.data, 1);
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
|
||||
let matrix = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
if !matrix.is_square() {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"last 2 dimensions of the array must be square: {1} != {2}",
|
||||
0,
|
||||
dim1[0] as i64,
|
||||
dim1[1] as i64
|
||||
);
|
||||
}
|
||||
out_slice[0] = matrix.determinant();
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn sp_linalg_lu(mat1: *mut InputMatrix, out_l: *mut InputMatrix, out_u: *mut InputMatrix) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let out_l = out_l.as_mut().unwrap();
|
||||
let out_u = out_u.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
|
||||
let dim1 = (*mat1).get_dims();
|
||||
let outl_dim = (*out_l).get_dims();
|
||||
let outu_dim = (*out_u).get_dims();
|
||||
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
let out_l_slice = slice::from_raw_parts_mut(out_l.data, outl_dim[0] * outl_dim[1]);
|
||||
let out_u_slice = slice::from_raw_parts_mut(out_u.data, outu_dim[0] * outu_dim[1]);
|
||||
|
||||
let matrix = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
let (_, l, u) = matrix.lu().unpack();
|
||||
|
||||
out_l_slice.copy_from_slice(l.transpose().as_slice());
|
||||
out_u_slice.copy_from_slice(u.transpose().as_slice());
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn sp_linalg_schur(mat1: *mut InputMatrix, out_t: *mut InputMatrix, out_z: *mut InputMatrix) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let out_t = out_t.as_mut().unwrap();
|
||||
let out_z = out_z.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
|
||||
let dim1 = (*mat1).get_dims();
|
||||
|
||||
if dim1[0] != dim1[1] {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"last 2 dimensions of the array must be square: {1} != {2}",
|
||||
0,
|
||||
dim1[0] as i64,
|
||||
dim1[1] as i64
|
||||
);
|
||||
}
|
||||
|
||||
let out_t_dim = (*out_t).get_dims();
|
||||
let out_z_dim = (*out_z).get_dims();
|
||||
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
let out_t_slice = slice::from_raw_parts_mut(out_t.data, out_t_dim[0] * out_t_dim[1]);
|
||||
let out_z_slice = slice::from_raw_parts_mut(out_z.data, out_z_dim[0] * out_z_dim[1]);
|
||||
|
||||
let matrix = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
let (z, t) = matrix.schur().unpack();
|
||||
|
||||
out_t_slice.copy_from_slice(t.transpose().as_slice());
|
||||
out_z_slice.copy_from_slice(z.transpose().as_slice());
|
||||
}
|
||||
|
||||
/// # Safety
|
||||
///
|
||||
/// `mat1` should point to a valid 2DArray of `f64` floats in row-major order
|
||||
#[no_mangle]
|
||||
pub unsafe extern "C" fn sp_linalg_hessenberg(
|
||||
mat1: *mut InputMatrix,
|
||||
out_h: *mut InputMatrix,
|
||||
out_q: *mut InputMatrix,
|
||||
) {
|
||||
let mat1 = mat1.as_mut().unwrap();
|
||||
let out_h = out_h.as_mut().unwrap();
|
||||
let out_q = out_q.as_mut().unwrap();
|
||||
|
||||
if mat1.ndims != 2 {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"expected 2D Vector Input, but received {1}D input)",
|
||||
0,
|
||||
mat1.ndims as i64,
|
||||
0
|
||||
);
|
||||
}
|
||||
|
||||
let dim1 = (*mat1).get_dims();
|
||||
|
||||
if dim1[0] != dim1[1] {
|
||||
artiq_raise!(
|
||||
"ValueError",
|
||||
"last 2 dimensions of the array must be square: {1} != {2}",
|
||||
0,
|
||||
dim1[0] as i64,
|
||||
dim1[1] as i64
|
||||
);
|
||||
}
|
||||
|
||||
let out_h_dim = (*out_h).get_dims();
|
||||
let out_q_dim = (*out_q).get_dims();
|
||||
|
||||
let data_slice1 = slice::from_raw_parts_mut(mat1.data, dim1[0] * dim1[1]);
|
||||
let out_h_slice = slice::from_raw_parts_mut(out_h.data, out_h_dim[0] * out_h_dim[1]);
|
||||
let out_q_slice = slice::from_raw_parts_mut(out_q.data, out_q_dim[0] * out_q_dim[1]);
|
||||
|
||||
let matrix = DMatrix::from_row_slice(dim1[0], dim1[1], data_slice1);
|
||||
let (q, h) = matrix.hessenberg().unpack();
|
||||
|
||||
out_h_slice.copy_from_slice(h.transpose().as_slice());
|
||||
out_q_slice.copy_from_slice(q.transpose().as_slice());
|
||||
}
|
||||
|
|
@ -13,6 +13,7 @@ mod dma;
|
|||
mod rpc;
|
||||
pub use dma::DmaRecorder;
|
||||
mod cache;
|
||||
mod linalg;
|
||||
#[cfg(has_drtio)]
|
||||
mod subkernel;
|
||||
|
||||
|
|
|
|||
|
|
@ -756,7 +756,6 @@ pub fn main(timer: GlobalTimer, cfg: Config) {
|
|||
moninj::start(timer, &aux_mutex, &drtio_routing_table);
|
||||
|
||||
let control: Rc<RefCell<kernel::Control>> = Rc::new(RefCell::new(kernel::Control::start()));
|
||||
let idle_kernel = Rc::new(cfg.read("idle_kernel").ok());
|
||||
if let Ok(buffer) = cfg.read("startup_kernel") {
|
||||
info!("Loading startup kernel...");
|
||||
let routing_table = drtio_routing_table.borrow();
|
||||
|
|
@ -783,13 +782,26 @@ pub fn main(timer: GlobalTimer, cfg: Config) {
|
|||
}
|
||||
}
|
||||
|
||||
mgmt::start(cfg);
|
||||
let cfg = Rc::new(cfg);
|
||||
let restart_idle = Rc::new(Semaphore::new(1, 1));
|
||||
mgmt::start(cfg.clone(), restart_idle.clone(), Some((&aux_mutex, &drtio_routing_table, timer)));
|
||||
|
||||
task::spawn(async move {
|
||||
let connection = Rc::new(Semaphore::new(1, 1));
|
||||
let terminate = Rc::new(Semaphore::new(0, 1));
|
||||
let can_restart_idle = Rc::new(Semaphore::new(1, 1));
|
||||
let restart_idle = restart_idle.clone();
|
||||
loop {
|
||||
let mut stream = TcpStream::accept(1381, 0x10_000, 0x10_000).await.unwrap();
|
||||
let control = control.clone();
|
||||
let mut maybe_stream = select_biased! {
|
||||
s = (async {
|
||||
TcpStream::accept(1381, 0x10_000, 0x10_000).await.unwrap()
|
||||
}).fuse() => Some(s),
|
||||
_ = (async {
|
||||
restart_idle.async_wait().await;
|
||||
can_restart_idle.async_wait().await;
|
||||
}).fuse() => None
|
||||
};
|
||||
|
||||
if connection.try_wait().is_none() {
|
||||
// there is an existing connection
|
||||
|
|
@ -797,47 +809,58 @@ pub fn main(timer: GlobalTimer, cfg: Config) {
|
|||
connection.async_wait().await;
|
||||
}
|
||||
|
||||
let maybe_idle_kernel = cfg.read("idle_kernel").ok();
|
||||
if maybe_idle_kernel.is_none() && maybe_stream.is_none() {
|
||||
control.borrow_mut().restart(); // terminate idle kernel if running
|
||||
}
|
||||
|
||||
let control = control.clone();
|
||||
let idle_kernel = idle_kernel.clone();
|
||||
let connection = connection.clone();
|
||||
let terminate = terminate.clone();
|
||||
let can_restart_idle = can_restart_idle.clone();
|
||||
let up_destinations = up_destinations.clone();
|
||||
let aux_mutex = aux_mutex.clone();
|
||||
let routing_table = drtio_routing_table.clone();
|
||||
|
||||
// we make sure the value of terminate is 0 before we start
|
||||
let _ = terminate.try_wait();
|
||||
let _ = can_restart_idle.try_wait();
|
||||
task::spawn(async move {
|
||||
let routing_table = routing_table.borrow();
|
||||
select_biased! {
|
||||
_ = (async {
|
||||
let _ = handle_connection(&mut stream, control.clone(), &up_destinations, &aux_mutex, &routing_table, timer)
|
||||
.await
|
||||
.map_err(|e| warn!("connection terminated: {}", e));
|
||||
if let Some(buffer) = &*idle_kernel {
|
||||
info!("Loading idle kernel");
|
||||
let res = handle_flash_kernel(&buffer, &control, &up_destinations, &aux_mutex, &routing_table, timer)
|
||||
.await;
|
||||
match res {
|
||||
#[cfg(has_drtio)]
|
||||
Err(Error::DestinationDown) => {
|
||||
let mut countdown = timer.countdown();
|
||||
delay(&mut countdown, Milliseconds(500)).await;
|
||||
if let Some(stream) = &mut maybe_stream {
|
||||
let _ = handle_connection(stream, control.clone(), &up_destinations, &aux_mutex, &routing_table, timer)
|
||||
.await
|
||||
.map_err(|e| warn!("connection terminated: {}", e));
|
||||
}
|
||||
can_restart_idle.signal();
|
||||
match maybe_idle_kernel {
|
||||
Some(buffer) => {
|
||||
loop {
|
||||
info!("loading idle kernel");
|
||||
match handle_flash_kernel(&buffer, &control, &up_destinations, &aux_mutex, &routing_table, timer).await {
|
||||
Ok(_) => {
|
||||
info!("running idle kernel");
|
||||
match handle_run_kernel(None, &control, &up_destinations, &aux_mutex, &routing_table, timer).await {
|
||||
Ok(_) => info!("idle kernel finished"),
|
||||
Err(_) => warn!("idle kernel running error")
|
||||
}
|
||||
},
|
||||
Err(_) => warn!("idle kernel loading error")
|
||||
}
|
||||
}
|
||||
Err(_) => warn!("error loading idle kernel"),
|
||||
_ => (),
|
||||
}
|
||||
info!("Running idle kernel");
|
||||
let _ = handle_run_kernel(None, &control, &up_destinations, &aux_mutex, &routing_table, timer)
|
||||
.await.map_err(|_| warn!("error running idle kernel"));
|
||||
info!("Idle kernel terminated");
|
||||
},
|
||||
None => info!("no idle kernel found")
|
||||
}
|
||||
}).fuse() => (),
|
||||
_ = terminate.async_wait().fuse() => ()
|
||||
}
|
||||
connection.signal();
|
||||
let _ = stream.flush().await;
|
||||
let _ = stream.abort().await;
|
||||
if let Some(stream) = maybe_stream {
|
||||
let _ = stream.flush().await;
|
||||
let _ = stream.abort().await;
|
||||
}
|
||||
});
|
||||
}
|
||||
});
|
||||
|
|
@ -886,7 +909,8 @@ pub fn soft_panic_main(timer: GlobalTimer, cfg: Config) -> ! {
|
|||
|
||||
Sockets::init(32);
|
||||
|
||||
mgmt::start(cfg);
|
||||
let dummy = Rc::new(Semaphore::new(0, 1));
|
||||
mgmt::start(Rc::new(cfg), dummy, None);
|
||||
|
||||
// getting eth settings disables the LED as it resets GPIO
|
||||
// need to re-enable it here
|
||||
|
|
|
|||
|
|
@ -1,16 +1,20 @@
|
|||
use alloc::{rc::Rc, string::String, vec::Vec};
|
||||
use core::cell::RefCell;
|
||||
use core::{cell::RefCell, ops::Deref};
|
||||
|
||||
use futures::{future::poll_fn, task::Poll};
|
||||
use libasync::{smoltcp::TcpStream, task};
|
||||
use libboard_artiq::logger::{BufferLogger, LogBufferRef};
|
||||
use libboard_zynq::{slcr, smoltcp};
|
||||
use libboard_artiq::{drtio_routing::RoutingTable,
|
||||
logger::{BufferLogger, LogBufferRef}};
|
||||
use libboard_zynq::{smoltcp, timer::GlobalTimer};
|
||||
use libconfig::Config;
|
||||
use log::{self, debug, error, info, warn, LevelFilter};
|
||||
use libcortex_a9::{mutex::Mutex, semaphore::Semaphore};
|
||||
use log::{self, debug, error, info, warn};
|
||||
use num_derive::FromPrimitive;
|
||||
use num_traits::FromPrimitive;
|
||||
|
||||
use crate::proto_async::*;
|
||||
#[cfg(has_drtio)]
|
||||
use crate::rtio_mgt::drtio;
|
||||
|
||||
#[derive(Debug, Clone, Copy, PartialEq, Eq)]
|
||||
pub enum Error {
|
||||
|
|
@ -18,6 +22,8 @@ pub enum Error {
|
|||
UnknownLogLevel(u8),
|
||||
UnexpectedPattern,
|
||||
UnrecognizedPacket,
|
||||
#[cfg(has_drtio)]
|
||||
DrtioError(drtio::Error),
|
||||
}
|
||||
|
||||
type Result<T> = core::result::Result<T, Error>;
|
||||
|
|
@ -29,6 +35,8 @@ impl core::fmt::Display for Error {
|
|||
&Error::UnknownLogLevel(lvl) => write!(f, "unknown log level {}", lvl),
|
||||
&Error::UnexpectedPattern => write!(f, "unexpected pattern"),
|
||||
&Error::UnrecognizedPacket => write!(f, "unrecognized packet"),
|
||||
#[cfg(has_drtio)]
|
||||
&Error::DrtioError(error) => write!(f, "drtio error: {}", error),
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -39,6 +47,13 @@ impl From<smoltcp::Error> for Error {
|
|||
}
|
||||
}
|
||||
|
||||
#[cfg(has_drtio)]
|
||||
impl From<drtio::Error> for Error {
|
||||
fn from(error: drtio::Error) -> Self {
|
||||
Error::DrtioError(error)
|
||||
}
|
||||
}
|
||||
|
||||
#[derive(Debug, FromPrimitive)]
|
||||
pub enum Request {
|
||||
GetLog = 1,
|
||||
|
|
@ -51,6 +66,11 @@ pub enum Request {
|
|||
ConfigRead = 12,
|
||||
ConfigWrite = 13,
|
||||
ConfigRemove = 14,
|
||||
ConfigErase = 15,
|
||||
|
||||
DebugAllocator = 8,
|
||||
|
||||
Flash = 9,
|
||||
}
|
||||
|
||||
#[repr(i8)]
|
||||
|
|
@ -111,10 +131,736 @@ async fn read_key(stream: &mut TcpStream) -> Result<String> {
|
|||
Ok(String::from_utf8(buffer).unwrap())
|
||||
}
|
||||
|
||||
async fn handle_connection(stream: &mut TcpStream, pull_id: Rc<RefCell<u32>>, cfg: Rc<Config>) -> Result<()> {
|
||||
#[cfg(has_drtio)]
|
||||
mod remote_coremgmt {
|
||||
use core_io::Read;
|
||||
use io::ProtoWrite;
|
||||
use libboard_artiq::{drtioaux_async,
|
||||
drtioaux_proto::{Packet, MASTER_PAYLOAD_MAX_SIZE}};
|
||||
|
||||
use super::*;
|
||||
|
||||
pub async fn get_log(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
) -> Result<()> {
|
||||
let mut buffer = Vec::new();
|
||||
loop {
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtGetLogRequest {
|
||||
destination,
|
||||
clear: false,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtGetLogReply { last, length, data }) => {
|
||||
buffer.extend(&data[..length as usize]);
|
||||
if last {
|
||||
write_i8(stream, Reply::LogContent as i8).await?;
|
||||
write_chunk(stream, &buffer).await?;
|
||||
return Ok(());
|
||||
}
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
return Err(drtio::Error::UnexpectedReply.into());
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
return Err(e.into());
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn clear_log(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
) -> Result<()> {
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtClearLogRequest { destination },
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtReply { succeeded: true }) => {
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::UnexpectedReply.into())
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(e.into())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn pull_log(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
pull_id: &Rc<RefCell<u32>>,
|
||||
) -> Result<()> {
|
||||
let id = {
|
||||
let mut guard = pull_id.borrow_mut();
|
||||
*guard += 1;
|
||||
*guard
|
||||
};
|
||||
let mut buffer = Vec::new();
|
||||
|
||||
loop {
|
||||
if id != *pull_id.borrow() {
|
||||
// another connection attempts to pull the log...
|
||||
// abort this connection...
|
||||
break;
|
||||
}
|
||||
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtGetLogRequest {
|
||||
destination,
|
||||
clear: true,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtGetLogReply { last, length, data }) => {
|
||||
buffer.extend(&data[..length as usize]);
|
||||
if last {
|
||||
write_chunk(stream, &buffer).await?;
|
||||
buffer.clear();
|
||||
task::r#yield().await;
|
||||
}
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
return Err(drtio::Error::UnexpectedReply.into());
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
return Err(e.into());
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn set_log_filter(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
level: log::LevelFilter,
|
||||
) -> Result<()> {
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtSetLogLevelRequest {
|
||||
destination,
|
||||
log_level: level as u8,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtReply { succeeded: true }) => {
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::UnexpectedReply.into())
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(e.into())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn set_uart_log_filter(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
level: log::LevelFilter,
|
||||
) -> Result<()> {
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtSetUartLogLevelRequest {
|
||||
destination,
|
||||
log_level: level as u8,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtReply { succeeded: true }) => {
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::UnexpectedReply.into())
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(e.into())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn config_read(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
_cfg: &Rc<Config>,
|
||||
key: &String,
|
||||
) -> Result<()> {
|
||||
let mut config_key: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
|
||||
let len = key.len();
|
||||
config_key[..len].clone_from_slice(key.as_bytes());
|
||||
|
||||
let mut reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtConfigReadRequest {
|
||||
destination: destination,
|
||||
length: len as u16,
|
||||
key: config_key,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
let mut buffer = Vec::<u8>::new();
|
||||
loop {
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtConfigReadReply { last, length, value }) => {
|
||||
buffer.extend(&value[..length as usize]);
|
||||
|
||||
if last {
|
||||
write_i8(stream, Reply::ConfigData as i8).await?;
|
||||
write_chunk(stream, &buffer).await?;
|
||||
return Ok(());
|
||||
}
|
||||
|
||||
reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtConfigReadContinue {
|
||||
destination: destination,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
return Err(drtio::Error::UnexpectedReply.into());
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
return Err(e.into());
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn config_write(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
_cfg: &Rc<Config>,
|
||||
key: &String,
|
||||
value: Vec<u8>,
|
||||
_restart_idle: &Rc<Semaphore>,
|
||||
) -> Result<()> {
|
||||
let mut message = Vec::with_capacity(key.len() + value.len() + 4 * 2);
|
||||
message.write_string(key).unwrap();
|
||||
message.write_bytes(&value).unwrap();
|
||||
|
||||
match drtio::partition_data(
|
||||
linkno,
|
||||
aux_mutex,
|
||||
routing_table,
|
||||
timer,
|
||||
&message,
|
||||
|slice, status, len: usize| Packet::CoreMgmtConfigWriteRequest {
|
||||
destination: destination,
|
||||
last: status.is_last(),
|
||||
length: len as u16,
|
||||
data: *slice,
|
||||
},
|
||||
|reply| match reply {
|
||||
Packet::CoreMgmtReply { succeeded: true } => Ok(()),
|
||||
packet => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
Err(drtio::Error::UnexpectedReply)
|
||||
}
|
||||
},
|
||||
)
|
||||
.await
|
||||
{
|
||||
Ok(()) => {
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(e.into())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn config_remove(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
_cfg: &Rc<Config>,
|
||||
key: &String,
|
||||
_restart_idle: &Rc<Semaphore>,
|
||||
) -> Result<()> {
|
||||
let mut config_key: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
|
||||
let len = key.len();
|
||||
config_key[..len].clone_from_slice(key.as_bytes());
|
||||
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtConfigRemoveRequest {
|
||||
destination: destination,
|
||||
length: len as u16,
|
||||
key: config_key,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtReply { succeeded: true }) => {
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::UnexpectedReply.into())
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(e.into())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn config_erase(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
) -> Result<()> {
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtConfigEraseRequest {
|
||||
destination: destination,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtReply { succeeded: true }) => {
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::UnexpectedReply.into())
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(e.into())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn reboot(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
) -> Result<()> {
|
||||
info!("initited reboot request to satellite destination {}", destination);
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtRebootRequest {
|
||||
destination: destination,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtReply { succeeded: true }) => {
|
||||
write_i8(stream, Reply::RebootImminent as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::UnexpectedReply.into())
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(e.into())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn debug_allocator(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
) -> Result<()> {
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtAllocatorDebugRequest {
|
||||
destination: destination,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtReply { succeeded: true }) => {
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
Err(drtio::Error::UnexpectedReply.into())
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
Err(e.into())
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub async fn image_write(
|
||||
stream: &mut TcpStream,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
timer: GlobalTimer,
|
||||
linkno: u8,
|
||||
destination: u8,
|
||||
_cfg: &Rc<Config>,
|
||||
image: Vec<u8>,
|
||||
) -> Result<()> {
|
||||
let mut image = &image[..];
|
||||
|
||||
while !image.is_empty() {
|
||||
let mut data = [0; MASTER_PAYLOAD_MAX_SIZE];
|
||||
let len = image.read(&mut data).unwrap();
|
||||
let last = image.is_empty();
|
||||
|
||||
let reply = drtio::aux_transact(
|
||||
aux_mutex,
|
||||
linkno,
|
||||
routing_table,
|
||||
&Packet::CoreMgmtFlashRequest {
|
||||
destination: destination,
|
||||
last: last,
|
||||
length: len as u16,
|
||||
data: data,
|
||||
},
|
||||
timer,
|
||||
)
|
||||
.await;
|
||||
|
||||
match reply {
|
||||
Ok(Packet::CoreMgmtReply { succeeded: true }) if !last => Ok(()),
|
||||
Ok(Packet::CoreMgmtDropLink) if last => drtioaux_async::send(
|
||||
linkno,
|
||||
&Packet::CoreMgmtDropLinkAck {
|
||||
destination: destination,
|
||||
},
|
||||
)
|
||||
.await
|
||||
.map_err(|_| drtio::Error::AuxError),
|
||||
Ok(packet) => {
|
||||
error!("received unexpected aux packet: {:?}", packet);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::UnexpectedReply)
|
||||
}
|
||||
Err(e) => {
|
||||
error!("aux packet error ({})", e);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::AuxError)
|
||||
}
|
||||
}?;
|
||||
}
|
||||
|
||||
write_i8(stream, Reply::RebootImminent as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
mod local_coremgmt {
|
||||
use libboard_zynq::slcr;
|
||||
|
||||
use super::*;
|
||||
|
||||
pub async fn get_log(stream: &mut TcpStream) -> Result<()> {
|
||||
let buffer = get_logger_buffer().await.extract().as_bytes().to_vec();
|
||||
write_i8(stream, Reply::LogContent as i8).await?;
|
||||
write_chunk(stream, &buffer).await?;
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn clear_log(stream: &mut TcpStream) -> Result<()> {
|
||||
let mut buffer = get_logger_buffer().await;
|
||||
buffer.clear();
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn pull_log(stream: &mut TcpStream, pull_id: &Rc<RefCell<u32>>) -> Result<()> {
|
||||
let id = {
|
||||
let mut guard = pull_id.borrow_mut();
|
||||
*guard += 1;
|
||||
*guard
|
||||
};
|
||||
loop {
|
||||
let mut buffer = get_logger_buffer_pred(|b| !b.is_empty()).await;
|
||||
if id != *pull_id.borrow() {
|
||||
// another connection attempts to pull the log...
|
||||
// abort this connection...
|
||||
break;
|
||||
}
|
||||
let bytes = buffer.extract().as_bytes().to_vec();
|
||||
buffer.clear();
|
||||
core::mem::drop(buffer);
|
||||
write_chunk(stream, &bytes).await?;
|
||||
if log::max_level() == log::LevelFilter::Trace {
|
||||
// temporarily discard all trace level log
|
||||
let logger = unsafe { BufferLogger::get_logger().as_mut().unwrap() };
|
||||
logger.set_buffer_log_level(log::LevelFilter::Debug);
|
||||
stream.flush().await?;
|
||||
logger.set_buffer_log_level(log::LevelFilter::Trace);
|
||||
}
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn set_log_filter(stream: &mut TcpStream, lvl: log::LevelFilter) -> Result<()> {
|
||||
info!("Changing log level to {}", lvl);
|
||||
log::set_max_level(lvl);
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn set_uart_log_filter(stream: &mut TcpStream, lvl: log::LevelFilter) -> Result<()> {
|
||||
info!("Changing UART log level to {}", lvl);
|
||||
unsafe {
|
||||
BufferLogger::get_logger().as_ref().unwrap().set_uart_log_level(lvl);
|
||||
}
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn config_read(stream: &mut TcpStream, cfg: &Rc<Config>, key: &String) -> Result<()> {
|
||||
let value = cfg.read(&key);
|
||||
if let Ok(value) = value {
|
||||
debug!("got value");
|
||||
write_i8(stream, Reply::ConfigData as i8).await?;
|
||||
write_chunk(stream, &value).await?;
|
||||
} else {
|
||||
warn!("read error: no such key");
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn config_write(stream: &mut TcpStream, cfg: &Rc<Config>, key: &String, value: Vec<u8>, restart_idle: &Rc<Semaphore>) -> Result<()> {
|
||||
let value = cfg.write(&key, value);
|
||||
if value.is_ok() {
|
||||
debug!("write success");
|
||||
if key == "idle_kernel" {
|
||||
restart_idle.signal();
|
||||
}
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
} else {
|
||||
// this is an error because we do not expect write to fail
|
||||
error!("failed to write: {:?}", value);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn config_remove(stream: &mut TcpStream, cfg: &Rc<Config>, key: &String, restart_idle: &Rc<Semaphore>) -> Result<()> {
|
||||
debug!("erase key: {}", key);
|
||||
let value = cfg.remove(&key);
|
||||
if value.is_ok() {
|
||||
debug!("erase success");
|
||||
if key == "idle_kernel" {
|
||||
restart_idle.signal();
|
||||
}
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
} else {
|
||||
warn!("erase failed");
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn config_erase(stream: &mut TcpStream) -> Result<()> {
|
||||
error!("zynq device does not support config erase");
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn reboot(stream: &mut TcpStream) -> Result<()> {
|
||||
info!("rebooting");
|
||||
write_i8(stream, Reply::RebootImminent as i8).await?;
|
||||
stream.flush().await?;
|
||||
slcr::reboot();
|
||||
|
||||
unreachable!()
|
||||
}
|
||||
|
||||
pub async fn debug_allocator(_stream: &mut TcpStream) -> Result<()> {
|
||||
error!("zynq device does not support allocator debug print");
|
||||
Ok(())
|
||||
}
|
||||
|
||||
pub async fn image_write(stream: &mut TcpStream, cfg: &Rc<Config>, image: Vec<u8>) -> Result<()> {
|
||||
let value = cfg.write("boot", image);
|
||||
if value.is_ok() {
|
||||
reboot(stream).await?;
|
||||
} else {
|
||||
// this is an error because we do not expect write to fail
|
||||
error!("failed to write boot file: {:?}", value);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
}
|
||||
Ok(())
|
||||
}
|
||||
}
|
||||
|
||||
#[cfg(has_drtio)]
|
||||
macro_rules! process {
|
||||
($stream: ident, $drtio_tuple:ident, $destination:expr, $func:ident $(, $param:expr)*) => {{
|
||||
if $destination == 0 {
|
||||
local_coremgmt::$func($stream, $($param, )*).await
|
||||
} else if let Some((aux_mutex, routing_table, timer)) = $drtio_tuple {
|
||||
let linkno = routing_table.0[$destination as usize][0] - 1 as u8;
|
||||
remote_coremgmt::$func($stream, aux_mutex, routing_table, timer, linkno, $destination, $($param, )*).await
|
||||
} else {
|
||||
error!("coremgmt-over-drtio not supported for panicked device, please reboot");
|
||||
write_i8($stream, Reply::Error as i8).await?;
|
||||
Err(drtio::Error::LinkDown.into())
|
||||
}
|
||||
}}
|
||||
}
|
||||
|
||||
#[cfg(not(has_drtio))]
|
||||
macro_rules! process {
|
||||
($stream: ident, $drtio_tuple:ident, $destination:expr, $func:ident $(, $param:expr)*) => {{
|
||||
local_coremgmt::$func($stream, $($param, )*).await
|
||||
}}
|
||||
}
|
||||
|
||||
async fn handle_connection(
|
||||
stream: &mut TcpStream,
|
||||
pull_id: Rc<RefCell<u32>>,
|
||||
cfg: Rc<Config>,
|
||||
restart_idle: Rc<Semaphore>,
|
||||
_drtio_tuple: Option<(&Rc<Mutex<bool>>, &RoutingTable, GlobalTimer)>,
|
||||
) -> Result<()> {
|
||||
if !expect(&stream, b"ARTIQ management\n").await? {
|
||||
return Err(Error::UnexpectedPattern);
|
||||
}
|
||||
|
||||
let _destination: u8 = read_i8(stream).await? as u8;
|
||||
stream.send_slice("e".as_bytes()).await?;
|
||||
|
||||
loop {
|
||||
|
|
@ -124,72 +870,23 @@ async fn handle_connection(stream: &mut TcpStream, pull_id: Rc<RefCell<u32>>, cf
|
|||
}
|
||||
let msg: Request = FromPrimitive::from_i8(msg?).ok_or(Error::UnrecognizedPacket)?;
|
||||
match msg {
|
||||
Request::GetLog => {
|
||||
let buffer = get_logger_buffer().await.extract().as_bytes().to_vec();
|
||||
write_i8(stream, Reply::LogContent as i8).await?;
|
||||
write_chunk(stream, &buffer).await?;
|
||||
}
|
||||
Request::ClearLog => {
|
||||
let mut buffer = get_logger_buffer().await;
|
||||
buffer.clear();
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
}
|
||||
Request::PullLog => {
|
||||
let id = {
|
||||
let mut guard = pull_id.borrow_mut();
|
||||
*guard += 1;
|
||||
*guard
|
||||
};
|
||||
loop {
|
||||
let mut buffer = get_logger_buffer_pred(|b| !b.is_empty()).await;
|
||||
if id != *pull_id.borrow() {
|
||||
// another connection attempts to pull the log...
|
||||
// abort this connection...
|
||||
break;
|
||||
}
|
||||
let bytes = buffer.extract().as_bytes().to_vec();
|
||||
buffer.clear();
|
||||
core::mem::drop(buffer);
|
||||
write_chunk(stream, &bytes).await?;
|
||||
if log::max_level() == LevelFilter::Trace {
|
||||
// temporarily discard all trace level log
|
||||
let logger = unsafe { BufferLogger::get_logger().as_mut().unwrap() };
|
||||
logger.set_buffer_log_level(LevelFilter::Debug);
|
||||
stream.flush().await?;
|
||||
logger.set_buffer_log_level(LevelFilter::Trace);
|
||||
}
|
||||
}
|
||||
}
|
||||
Request::GetLog => process!(stream, _drtio_tuple, _destination, get_log),
|
||||
Request::ClearLog => process!(stream, _drtio_tuple, _destination, clear_log),
|
||||
Request::PullLog => process!(stream, _drtio_tuple, _destination, pull_log, &pull_id),
|
||||
Request::SetLogFilter => {
|
||||
let lvl = read_log_level_filter(stream).await?;
|
||||
info!("Changing log level to {}", lvl);
|
||||
log::set_max_level(lvl);
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
process!(stream, _drtio_tuple, _destination, set_log_filter, lvl)
|
||||
}
|
||||
Request::SetUartLogFilter => {
|
||||
let lvl = read_log_level_filter(stream).await?;
|
||||
info!("Changing UART log level to {}", lvl);
|
||||
unsafe {
|
||||
BufferLogger::get_logger().as_ref().unwrap().set_uart_log_level(lvl);
|
||||
}
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
process!(stream, _drtio_tuple, _destination, set_uart_log_filter, lvl)
|
||||
}
|
||||
Request::ConfigRead => {
|
||||
let key = read_key(stream).await?;
|
||||
debug!("read key: {}", key);
|
||||
let value = cfg.read(&key);
|
||||
if let Ok(value) = value {
|
||||
debug!("got value");
|
||||
write_i8(stream, Reply::ConfigData as i8).await?;
|
||||
write_chunk(stream, &value).await?;
|
||||
} else {
|
||||
warn!("read error: no such key");
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
}
|
||||
process!(stream, _drtio_tuple, _destination, config_read, &cfg, &key)
|
||||
}
|
||||
Request::ConfigWrite => {
|
||||
let key = read_key(stream).await?;
|
||||
debug!("write key: {}", key);
|
||||
let len = read_i32(stream).await?;
|
||||
let len = if len <= 0 { 0 } else { len as usize };
|
||||
let mut buffer = Vec::with_capacity(len);
|
||||
|
|
@ -197,49 +894,60 @@ async fn handle_connection(stream: &mut TcpStream, pull_id: Rc<RefCell<u32>>, cf
|
|||
buffer.set_len(len);
|
||||
}
|
||||
read_chunk(stream, &mut buffer).await?;
|
||||
let value = cfg.write(&key, buffer);
|
||||
if value.is_ok() {
|
||||
debug!("write success");
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
} else {
|
||||
// this is an error because we do not expect write to fail
|
||||
error!("failed to write: {:?}", value);
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
}
|
||||
process!(stream, _drtio_tuple, _destination, config_write, &cfg, &key, buffer, &restart_idle)
|
||||
}
|
||||
Request::ConfigRemove => {
|
||||
let key = read_key(stream).await?;
|
||||
debug!("erase key: {}", key);
|
||||
let value = cfg.remove(&key);
|
||||
if value.is_ok() {
|
||||
debug!("erase success");
|
||||
write_i8(stream, Reply::Success as i8).await?;
|
||||
} else {
|
||||
warn!("erase failed");
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
}
|
||||
process!(stream, _drtio_tuple, _destination, config_remove, &cfg, &key, &restart_idle)
|
||||
}
|
||||
Request::Reboot => {
|
||||
info!("rebooting");
|
||||
write_i8(stream, Reply::RebootImminent as i8).await?;
|
||||
stream.flush().await?;
|
||||
slcr::reboot();
|
||||
process!(stream, _drtio_tuple, _destination, reboot)
|
||||
}
|
||||
}
|
||||
Request::ConfigErase => {
|
||||
process!(stream, _drtio_tuple, _destination, config_erase)
|
||||
}
|
||||
Request::DebugAllocator => {
|
||||
process!(stream, _drtio_tuple, _destination, debug_allocator)
|
||||
}
|
||||
Request::Flash => {
|
||||
let len = read_i32(stream).await?;
|
||||
if len <= 0 {
|
||||
write_i8(stream, Reply::Error as i8).await?;
|
||||
return Err(Error::UnexpectedPattern);
|
||||
}
|
||||
let mut buffer = Vec::with_capacity(len as usize);
|
||||
unsafe {
|
||||
buffer.set_len(len as usize);
|
||||
}
|
||||
read_chunk(stream, &mut buffer).await?;
|
||||
process!(stream, _drtio_tuple, _destination, image_write, &cfg, buffer)
|
||||
}
|
||||
}?;
|
||||
}
|
||||
}
|
||||
|
||||
pub fn start(cfg: Config) {
|
||||
pub fn start(cfg: Rc<Config>, restart_idle: Rc<Semaphore>, drtio_tuple: Option<(&Rc<Mutex<bool>>, &Rc<RefCell<RoutingTable>>, GlobalTimer)>) {
|
||||
let drtio_tuple =
|
||||
drtio_tuple.map(|(aux_mutex, routing_table, timer)| (aux_mutex.clone(), routing_table.clone(), timer));
|
||||
task::spawn(async move {
|
||||
let pull_id = Rc::new(RefCell::new(0u32));
|
||||
let cfg = Rc::new(cfg);
|
||||
loop {
|
||||
let mut stream = TcpStream::accept(1380, 2048, 2048).await.unwrap();
|
||||
let pull_id = pull_id.clone();
|
||||
let cfg = cfg.clone();
|
||||
let restart_idle = restart_idle.clone();
|
||||
let drtio_tuple = drtio_tuple.clone();
|
||||
task::spawn(async move {
|
||||
info!("received connection");
|
||||
let _ = handle_connection(&mut stream, pull_id, cfg)
|
||||
// Avoid consuming the tuple
|
||||
// Keep the borrowed value on stack
|
||||
let drtio_tuple = drtio_tuple
|
||||
.as_ref()
|
||||
.map(|(aux_mutex, routing_table, timer)| (aux_mutex, routing_table.borrow(), *timer));
|
||||
let drtio_tuple = drtio_tuple
|
||||
.as_ref()
|
||||
.map(|(aux_mutex, routing_table, timer)| (*aux_mutex, routing_table.deref(), *timer));
|
||||
let _ = handle_connection(&mut stream, pull_id, cfg, restart_idle, drtio_tuple)
|
||||
.await
|
||||
.map_err(|e| warn!("connection terminated: {:?}", e));
|
||||
let _ = stream.flush().await;
|
||||
|
|
|
|||
|
|
@ -102,7 +102,7 @@ mod remote_moninj {
|
|||
overrd: i8,
|
||||
value: i8,
|
||||
) {
|
||||
let _lock = aux_mutex.lock();
|
||||
let _lock = aux_mutex.async_lock().await;
|
||||
drtioaux_async::send(
|
||||
linkno,
|
||||
&drtioaux_async::Packet::InjectionRequest {
|
||||
|
|
|
|||
|
|
@ -540,7 +540,7 @@ pub mod drtio {
|
|||
}
|
||||
}
|
||||
|
||||
async fn partition_data<PacketF, HandlerF>(
|
||||
pub async fn partition_data<PacketF, HandlerF>(
|
||||
linkno: u8,
|
||||
aux_mutex: &Rc<Mutex<bool>>,
|
||||
routing_table: &RoutingTable,
|
||||
|
|
|
|||
|
|
@ -15,7 +15,9 @@ build_zynq = { path = "../libbuild_zynq" }
|
|||
|
||||
[dependencies]
|
||||
log = { version = "0.4", default-features = false }
|
||||
byteorder = { version = "1.3", default-features = false }
|
||||
core_io = { version = "0.1", features = ["collections"] }
|
||||
crc = { version = "1.7", default-features = false }
|
||||
cslice = "0.3"
|
||||
embedded-hal = "0.2"
|
||||
|
||||
|
|
|
|||
|
|
@ -4,7 +4,9 @@
|
|||
|
||||
#[macro_use]
|
||||
extern crate log;
|
||||
extern crate byteorder;
|
||||
extern crate core_io;
|
||||
extern crate crc;
|
||||
extern crate cslice;
|
||||
extern crate embedded_hal;
|
||||
|
||||
|
|
@ -38,16 +40,18 @@ use libboard_artiq::{drtio_routing, drtioaux,
|
|||
pl::csr};
|
||||
#[cfg(feature = "target_kasli_soc")]
|
||||
use libboard_zynq::error_led::ErrorLED;
|
||||
use libboard_zynq::{i2c::I2c, print, println, time::Milliseconds, timer::GlobalTimer};
|
||||
use libboard_zynq::{i2c::I2c, print, println, slcr, time::Milliseconds, timer::GlobalTimer};
|
||||
use libconfig::Config;
|
||||
use libcortex_a9::{l2c::enable_l2_cache, regs::MPIDR};
|
||||
use libregister::RegisterR;
|
||||
use libsupport_zynq::{exception_vectors, ram};
|
||||
use mgmt::Manager as CoreManager;
|
||||
use routing::Router;
|
||||
use subkernel::Manager as KernelManager;
|
||||
|
||||
mod analyzer;
|
||||
mod dma;
|
||||
mod mgmt;
|
||||
mod repeater;
|
||||
mod routing;
|
||||
mod subkernel;
|
||||
|
|
@ -149,6 +153,7 @@ fn process_aux_packet(
|
|||
dma_manager: &mut DmaManager,
|
||||
analyzer: &mut Analyzer,
|
||||
kernel_manager: &mut KernelManager,
|
||||
core_manager: &mut CoreManager,
|
||||
router: &mut Router,
|
||||
) -> Result<(), drtioaux::Error> {
|
||||
// In the code below, *_chan_sel_write takes an u8 if there are fewer than 256 channels,
|
||||
|
|
@ -1010,6 +1015,317 @@ fn process_aux_packet(
|
|||
}
|
||||
Ok(())
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtGetLogRequest {
|
||||
destination: _destination,
|
||||
clear,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
let mut data_slice = [0; SAT_PAYLOAD_MAX_SIZE];
|
||||
let meta = core_manager.log_get_slice(&mut data_slice, clear);
|
||||
drtioaux::send(
|
||||
0,
|
||||
&drtioaux::Packet::CoreMgmtGetLogReply {
|
||||
last: meta.status.is_last(),
|
||||
length: meta.len as u16,
|
||||
data: data_slice,
|
||||
},
|
||||
)
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtClearLogRequest {
|
||||
destination: _destination,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
mgmt::clear_log();
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtSetLogLevelRequest {
|
||||
destination: _destination,
|
||||
log_level,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
if let Ok(level_filter) = mgmt::byte_to_level_filter(log_level) {
|
||||
info!("Changing log level to {}", level_filter);
|
||||
log::set_max_level(level_filter);
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })
|
||||
} else {
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
|
||||
}
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtSetUartLogLevelRequest {
|
||||
destination: _destination,
|
||||
log_level,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
if let Ok(level_filter) = mgmt::byte_to_level_filter(log_level) {
|
||||
info!("Changing UART log level to {}", level_filter);
|
||||
unsafe {
|
||||
logger::BufferLogger::get_logger()
|
||||
.as_ref()
|
||||
.unwrap()
|
||||
.set_uart_log_level(level_filter);
|
||||
}
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })
|
||||
} else {
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
|
||||
}
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtConfigReadRequest {
|
||||
destination: _destination,
|
||||
length,
|
||||
key,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
let mut value_slice = [0; SAT_PAYLOAD_MAX_SIZE];
|
||||
|
||||
let key_slice = &key[..length as usize];
|
||||
if !key_slice.is_ascii() {
|
||||
error!("invalid key");
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
|
||||
} else {
|
||||
let key = core::str::from_utf8(key_slice).unwrap();
|
||||
if core_manager.fetch_config_value(key).is_ok() {
|
||||
let meta = core_manager.get_config_value_slice(&mut value_slice);
|
||||
drtioaux::send(
|
||||
0,
|
||||
&drtioaux::Packet::CoreMgmtConfigReadReply {
|
||||
last: meta.status.is_last(),
|
||||
length: meta.len as u16,
|
||||
value: value_slice,
|
||||
},
|
||||
)
|
||||
} else {
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
|
||||
}
|
||||
}
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtConfigReadContinue {
|
||||
destination: _destination,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
let mut value_slice = [0; SAT_PAYLOAD_MAX_SIZE];
|
||||
let meta = core_manager.get_config_value_slice(&mut value_slice);
|
||||
drtioaux::send(
|
||||
0,
|
||||
&drtioaux::Packet::CoreMgmtConfigReadReply {
|
||||
last: meta.status.is_last(),
|
||||
length: meta.len as u16,
|
||||
value: value_slice,
|
||||
},
|
||||
)
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtConfigWriteRequest {
|
||||
destination: _destination,
|
||||
last,
|
||||
length,
|
||||
data,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
core_manager.add_config_data(&data, length as usize);
|
||||
|
||||
let mut succeeded = true;
|
||||
if last {
|
||||
succeeded = core_manager.write_config().is_ok();
|
||||
core_manager.clear_config_data();
|
||||
}
|
||||
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded })
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtConfigRemoveRequest {
|
||||
destination: _destination,
|
||||
length,
|
||||
key,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
let key_slice = &key[..length as usize];
|
||||
if !key_slice.is_ascii() {
|
||||
error!("invalid key");
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
|
||||
} else {
|
||||
let key = core::str::from_utf8(key_slice).unwrap();
|
||||
let succeeded = core_manager.remove_config(key).is_ok();
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded })
|
||||
}
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtConfigEraseRequest {
|
||||
destination: _destination,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
error!("config erase not supported on zynq device");
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtRebootRequest {
|
||||
destination: _destination,
|
||||
} => {
|
||||
info!("received reboot request");
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })?;
|
||||
info!("reboot imminent");
|
||||
slcr::reboot();
|
||||
|
||||
unreachable!();
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtAllocatorDebugRequest {
|
||||
destination: _destination,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
error!("debug allocator not supported on zynq device");
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtFlashRequest {
|
||||
destination: _destination,
|
||||
last,
|
||||
length,
|
||||
data,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
core_manager.add_image_data(&data, length as usize);
|
||||
|
||||
if last {
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtDropLink)
|
||||
} else {
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })
|
||||
}
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtDropLinkAck {
|
||||
destination: _destination,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
unsafe {
|
||||
csr::gt_drtio::txenable_write(0);
|
||||
}
|
||||
core_manager.write_image();
|
||||
info!("reboot imminent");
|
||||
slcr::reboot();
|
||||
Ok(())
|
||||
}
|
||||
|
||||
p => {
|
||||
warn!("received unexpected aux packet: {:?}", p);
|
||||
|
|
@ -1028,6 +1344,7 @@ fn process_aux_packets(
|
|||
dma_manager: &mut DmaManager,
|
||||
analyzer: &mut Analyzer,
|
||||
kernel_manager: &mut KernelManager,
|
||||
core_manager: &mut CoreManager,
|
||||
router: &mut Router,
|
||||
) {
|
||||
let result = drtioaux::recv(0).and_then(|packet| {
|
||||
|
|
@ -1043,6 +1360,7 @@ fn process_aux_packets(
|
|||
dma_manager,
|
||||
analyzer,
|
||||
kernel_manager,
|
||||
core_manager,
|
||||
router,
|
||||
)
|
||||
} else {
|
||||
|
|
@ -1239,7 +1557,7 @@ pub extern "C" fn main_core0() -> i32 {
|
|||
#[cfg(has_si549)]
|
||||
si549::helper_setup(&mut timer, &SI549_SETTINGS).expect("cannot initialize helper Si549");
|
||||
|
||||
let cfg = match Config::new() {
|
||||
let mut cfg = match Config::new() {
|
||||
Ok(cfg) => cfg,
|
||||
Err(err) => {
|
||||
warn!("config initialization failed: {}", err);
|
||||
|
|
@ -1314,6 +1632,7 @@ pub extern "C" fn main_core0() -> i32 {
|
|||
let mut dma_manager = DmaManager::new();
|
||||
let mut analyzer = Analyzer::new();
|
||||
let mut kernel_manager = KernelManager::new(&mut control);
|
||||
let mut core_manager = CoreManager::new(&mut cfg);
|
||||
|
||||
drtioaux::reset(0);
|
||||
drtiosat_reset(false);
|
||||
|
|
@ -1331,6 +1650,7 @@ pub extern "C" fn main_core0() -> i32 {
|
|||
&mut dma_manager,
|
||||
&mut analyzer,
|
||||
&mut kernel_manager,
|
||||
&mut core_manager,
|
||||
&mut router,
|
||||
);
|
||||
#[allow(unused_mut)]
|
||||
|
|
|
|||
|
|
@ -0,0 +1,145 @@
|
|||
use alloc::vec::Vec;
|
||||
|
||||
use byteorder::{ByteOrder, NativeEndian};
|
||||
use crc::crc32;
|
||||
use io::{ProtoRead, ProtoWrite};
|
||||
use libboard_artiq::{drtioaux_proto::SAT_PAYLOAD_MAX_SIZE,
|
||||
logger::{BufferLogger, LogBufferRef}};
|
||||
use libconfig::Config;
|
||||
use log::{debug, error, info, warn, LevelFilter};
|
||||
|
||||
use crate::routing::{SliceMeta, Sliceable};
|
||||
|
||||
type Result<T> = core::result::Result<T, ()>;
|
||||
|
||||
pub fn byte_to_level_filter(level_byte: u8) -> Result<LevelFilter> {
|
||||
Ok(match level_byte {
|
||||
0 => LevelFilter::Off,
|
||||
1 => LevelFilter::Error,
|
||||
2 => LevelFilter::Warn,
|
||||
3 => LevelFilter::Info,
|
||||
4 => LevelFilter::Debug,
|
||||
5 => LevelFilter::Trace,
|
||||
lv => {
|
||||
error!("unknown log level: {}", lv);
|
||||
return Err(());
|
||||
}
|
||||
})
|
||||
}
|
||||
|
||||
fn get_logger_buffer() -> LogBufferRef<'static> {
|
||||
let logger = unsafe { BufferLogger::get_logger().as_mut().unwrap() };
|
||||
loop {
|
||||
if let Some(buffer_ref) = logger.buffer() {
|
||||
return buffer_ref;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub fn clear_log() {
|
||||
let mut buffer = get_logger_buffer();
|
||||
buffer.clear();
|
||||
}
|
||||
|
||||
pub struct Manager<'a> {
|
||||
cfg: &'a mut Config,
|
||||
last_log: Sliceable,
|
||||
config_payload: Vec<u8>,
|
||||
last_value: Sliceable,
|
||||
image_payload: Vec<u8>,
|
||||
}
|
||||
|
||||
impl<'a> Manager<'_> {
|
||||
pub fn new(cfg: &mut Config) -> Manager {
|
||||
Manager {
|
||||
cfg: cfg,
|
||||
last_log: Sliceable::new(0, Vec::new()),
|
||||
config_payload: Vec::new(),
|
||||
last_value: Sliceable::new(0, Vec::new()),
|
||||
image_payload: Vec::new(),
|
||||
}
|
||||
}
|
||||
|
||||
pub fn log_get_slice(&mut self, data_slice: &mut [u8; SAT_PAYLOAD_MAX_SIZE], consume: bool) -> SliceMeta {
|
||||
// Populate buffer if depleted
|
||||
if self.last_log.at_end() {
|
||||
let mut buffer = get_logger_buffer();
|
||||
self.last_log.extend(buffer.extract().as_bytes());
|
||||
if consume {
|
||||
buffer.clear();
|
||||
}
|
||||
}
|
||||
|
||||
self.last_log.get_slice_satellite(data_slice)
|
||||
}
|
||||
|
||||
pub fn fetch_config_value(&mut self, key: &str) -> Result<()> {
|
||||
self.cfg
|
||||
.read(&key)
|
||||
.map(|value| {
|
||||
debug!("got value");
|
||||
self.last_value = Sliceable::new(0, value)
|
||||
})
|
||||
.map_err(|_| warn!("read error: no such key"))
|
||||
}
|
||||
|
||||
pub fn get_config_value_slice(&mut self, data_slice: &mut [u8; SAT_PAYLOAD_MAX_SIZE]) -> SliceMeta {
|
||||
self.last_value.get_slice_satellite(data_slice)
|
||||
}
|
||||
|
||||
pub fn add_config_data(&mut self, data: &[u8], data_len: usize) {
|
||||
self.config_payload.write_all(&data[..data_len]).unwrap();
|
||||
}
|
||||
|
||||
pub fn clear_config_data(&mut self) {
|
||||
self.config_payload.clear();
|
||||
}
|
||||
|
||||
pub fn write_config(&mut self) -> Result<()> {
|
||||
let mut payload = &self.config_payload[..];
|
||||
let key = payload.read_string().map_err(|_err| error!("error on reading key"))?;
|
||||
debug!("write key: {}", key);
|
||||
let value = payload.read_bytes().unwrap();
|
||||
|
||||
self.cfg
|
||||
.write(&key, value)
|
||||
.map(|()| debug!("write success"))
|
||||
.map_err(|err| error!("failed to write: {:?}", err))
|
||||
}
|
||||
|
||||
pub fn remove_config(&mut self, key: &str) -> Result<()> {
|
||||
debug!("erase key: {}", key);
|
||||
self.cfg
|
||||
.remove(&key)
|
||||
.map(|()| debug!("erase success"))
|
||||
.map_err(|err| warn!("failed to erase: {:?}", err))
|
||||
}
|
||||
|
||||
pub fn add_image_data(&mut self, data: &[u8], data_len: usize) {
|
||||
self.image_payload.extend(&data[..data_len]);
|
||||
}
|
||||
|
||||
pub fn write_image(&self) {
|
||||
let mut image = self.image_payload.clone();
|
||||
let image_ref = &image[..];
|
||||
let bin_len = image.len() - 4;
|
||||
|
||||
let (image_ref, expected_crc) = {
|
||||
let (image_ref, crc_slice) = image_ref.split_at(bin_len);
|
||||
(image_ref, NativeEndian::read_u32(crc_slice))
|
||||
};
|
||||
|
||||
let actual_crc = crc32::checksum_ieee(image_ref);
|
||||
|
||||
if actual_crc == expected_crc {
|
||||
info!("CRC passed. Writing boot image to SD card...");
|
||||
image.truncate(bin_len);
|
||||
self.cfg.write("boot", image).expect("failed to write boot image");
|
||||
} else {
|
||||
panic!(
|
||||
"CRC failed in SDRAM (actual {:08x}, expected {:08x})",
|
||||
actual_crc, expected_crc
|
||||
);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -4,7 +4,7 @@ use core::cmp::min;
|
|||
#[cfg(has_drtio_routing)]
|
||||
use libboard_artiq::pl::csr;
|
||||
use libboard_artiq::{drtio_routing, drtioaux,
|
||||
drtioaux_proto::{PayloadStatus, MASTER_PAYLOAD_MAX_SIZE}};
|
||||
drtioaux_proto::{PayloadStatus, MASTER_PAYLOAD_MAX_SIZE, SAT_PAYLOAD_MAX_SIZE}};
|
||||
|
||||
pub struct SliceMeta {
|
||||
pub destination: u8,
|
||||
|
|
@ -58,6 +58,7 @@ impl Sliceable {
|
|||
}
|
||||
|
||||
get_slice_fn!(get_slice_master, MASTER_PAYLOAD_MAX_SIZE);
|
||||
get_slice_fn!(get_slice_satellite, SAT_PAYLOAD_MAX_SIZE);
|
||||
}
|
||||
|
||||
// Packets from downstream (further satellites) are received and routed appropriately.
|
||||
|
|
|
|||
Loading…
Reference in New Issue