forked from M-Labs/artiq-zynq
fix drtioaux packet corruption
Co-authored-by: mwojcik <mw@m-labs.hk> Co-committed-by: mwojcik <mw@m-labs.hk>
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433a9cdaf1
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dcfb28ce61
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@ -3,6 +3,7 @@ use crc;
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use core_io::{ErrorKind as IoErrorKind, Error as IoError};
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use io::{proto::ProtoRead, proto::ProtoWrite, Cursor};
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use libboard_zynq::{timer::GlobalTimer, time::Milliseconds};
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use libcortex_a9::asm::dmb;
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use crate::mem::mem::DRTIOAUX_MEM;
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use crate::pl::csr::DRTIOAUX;
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use crate::drtioaux_proto::Error as ProtocolError;
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@ -57,14 +58,15 @@ pub fn has_rx_error(linkno: u8) -> bool {
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}
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}
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pub fn copy_work_buffer(src: *mut u16, dst: *mut u16, len: isize) {
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pub fn copy_work_buffer(src: *mut u32, dst: *mut u32, len: isize) {
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// AXI writes must be 4-byte aligned (drtio proto doesn't care for that),
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// and AXI burst reads/writes are not implemented yet in gateware
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// thus the need for a work buffer for transmitting and copying it over
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unsafe {
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for i in (0..(len/2)).step_by(2) {
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for i in 0..(len/4) {
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*dst.offset(i) = *src.offset(i);
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*dst.offset(i+1) = *src.offset(i+1);
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//data memory barrier to prevent bursts
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dmb();
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}
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}
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}
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@ -75,11 +77,11 @@ fn receive<F, T>(linkno: u8, f: F) -> Result<Option<T>, Error>
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let linkidx = linkno as usize;
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unsafe {
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if (DRTIOAUX[linkidx].aux_rx_present_read)() == 1 {
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let ptr = (DRTIOAUX_MEM[linkidx].base + DRTIOAUX_MEM[linkidx].size / 2) as *mut u16;
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let ptr = (DRTIOAUX_MEM[linkidx].base + DRTIOAUX_MEM[linkidx].size / 2) as *mut u32;
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let len = (DRTIOAUX[linkidx].aux_rx_length_read)() as usize;
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// work buffer to accomodate axi burst reads
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let mut buf: [u8; 1024] = [0; 1024];
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copy_work_buffer(ptr, buf.as_mut_ptr() as *mut u16, len as isize);
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copy_work_buffer(ptr, buf.as_mut_ptr() as *mut u32, len as isize);
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let result = f(&buf[0..len]);
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(DRTIOAUX[linkidx].aux_rx_present_write)(1);
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Ok(Some(result?))
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@ -133,12 +135,12 @@ fn transmit<F>(linkno: u8, f: F) -> Result<(), Error>
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let linkno = linkno as usize;
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unsafe {
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while (DRTIOAUX[linkno].aux_tx_read)() != 0 {}
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let ptr = DRTIOAUX_MEM[linkno].base as *mut u16;
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let ptr = DRTIOAUX_MEM[linkno].base as *mut u32;
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let len = DRTIOAUX_MEM[linkno].size / 2;
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// work buffer, works with unaligned mem access
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let mut buf: [u8; 1024] = [0; 1024];
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let len = f(&mut buf[0..len])?;
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copy_work_buffer(buf.as_mut_ptr() as *mut u16, ptr, len as isize);
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copy_work_buffer(buf.as_mut_ptr() as *mut u32, ptr, len as isize);
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(DRTIOAUX[linkno].aux_tx_length_write)(len as u16);
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(DRTIOAUX[linkno].aux_tx_write)(1);
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Ok(())
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@ -42,11 +42,11 @@ async fn receive<F, T>(linkno: u8, f: F) -> Result<Option<T>, Error>
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let linkidx = linkno as usize;
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unsafe {
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if (DRTIOAUX[linkidx].aux_rx_present_read)() == 1 {
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let ptr = (DRTIOAUX_MEM[linkidx].base + DRTIOAUX_MEM[linkidx].size / 2) as *mut u16;
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let ptr = (DRTIOAUX_MEM[linkidx].base + DRTIOAUX_MEM[linkidx].size / 2) as *mut u32;
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let len = (DRTIOAUX[linkidx].aux_rx_length_read)() as usize;
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// work buffer to accomodate axi burst reads
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let mut buf: [u8; 1024] = [0; 1024];
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copy_work_buffer(ptr, buf.as_mut_ptr() as *mut u16, len as isize);
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copy_work_buffer(ptr, buf.as_mut_ptr() as *mut u32, len as isize);
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let result = f(&buf[0..len]);
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(DRTIOAUX[linkidx].aux_rx_present_write)(1);
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Ok(Some(result?))
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@ -106,12 +106,12 @@ async fn transmit<F>(linkno: u8, f: F) -> Result<(), Error>
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let linkno = linkno as usize;
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unsafe {
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let _ = block_async!(tx_ready(linkno)).await;
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let ptr = DRTIOAUX_MEM[linkno].base as *mut u16;
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let ptr = DRTIOAUX_MEM[linkno].base as *mut u32;
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let len = DRTIOAUX_MEM[linkno].size / 2;
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// work buffer, works with unaligned mem access
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let mut buf: [u8; 1024] = [0; 1024];
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let len = f(&mut buf[0..len])?;
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copy_work_buffer(buf.as_mut_ptr() as *mut u16, ptr, len as isize);
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copy_work_buffer(buf.as_mut_ptr() as *mut u32, ptr, len as isize);
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(DRTIOAUX[linkno].aux_tx_length_write)(len as u16);
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(DRTIOAUX[linkno].aux_tx_write)(1);
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Ok(())
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