forked from M-Labs/artiq-zynq
add satman firmware (#136)
Reviewed-on: M-Labs/artiq-zynq#136 Co-authored-by: mwojcik <mw@m-labs.hk> Co-committed-by: mwojcik <mw@m-labs.hk>
This commit is contained in:
parent
41295b0e01
commit
8d2bb09149
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@ -54,8 +54,6 @@ pub enum Packet {
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SpiReadReply { succeeded: bool, data: u32 },
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SpiReadReply { succeeded: bool, data: u32 },
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SpiBasicReply { succeeded: bool },
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SpiBasicReply { succeeded: bool },
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JdacBasicRequest { destination: u8, dacno: u8, reqno: u8, param: u8 },
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JdacBasicReply { succeeded: bool, retval: u8 },
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}
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}
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impl Packet {
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impl Packet {
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@ -181,17 +179,6 @@ impl Packet {
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succeeded: reader.read_bool()?
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succeeded: reader.read_bool()?
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},
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},
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0xa0 => Packet::JdacBasicRequest {
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destination: reader.read_u8()?,
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dacno: reader.read_u8()?,
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reqno: reader.read_u8()?,
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param: reader.read_u8()?,
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},
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0xa1 => Packet::JdacBasicReply {
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succeeded: reader.read_bool()?,
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retval: reader.read_u8()?
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},
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ty => return Err(Error::UnknownPacket(ty))
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ty => return Err(Error::UnknownPacket(ty))
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})
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})
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}
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}
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@ -345,18 +332,6 @@ impl Packet {
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writer.write_bool(succeeded)?;
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writer.write_bool(succeeded)?;
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},
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},
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Packet::JdacBasicRequest { destination, dacno, reqno, param } => {
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writer.write_u8(0xa0)?;
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writer.write_u8(destination)?;
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writer.write_u8(dacno)?;
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writer.write_u8(reqno)?;
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writer.write_u8(param)?;
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}
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Packet::JdacBasicReply { succeeded, retval } => {
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writer.write_u8(0xa1)?;
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writer.write_bool(succeeded)?;
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writer.write_u8(retval)?;
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},
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}
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}
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Ok(())
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Ok(())
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}
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}
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@ -1,5 +1,22 @@
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use std::env;
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use std::fs::File;
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use std::fs::File;
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use std::io::{BufRead, BufReader};
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use std::io::{BufRead, BufReader, Write};
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use std::path::PathBuf;
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pub fn add_linker_script() {
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// Put the linker script somewhere the linker can find it
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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File::create(out.join("link.x"))
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.unwrap()
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.write_all(include_bytes!("link.x"))
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.unwrap();
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println!("cargo:rustc-link-search={}", out.display());
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// Only re-run the build script when link.x is changed,
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// instead of when any part of the source code changes.
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println!("cargo:rerun-if-changed=link.x");
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}
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pub fn cfg() {
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pub fn cfg() {
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// Handle rustc-cfg file
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// Handle rustc-cfg file
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@ -1,21 +1,6 @@
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use std::env;
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use std::fs::File;
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use std::io::Write;
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use std::path::PathBuf;
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extern crate build_zynq;
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extern crate build_zynq;
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fn main() {
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fn main() {
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// Put the linker script somewhere the linker can find it
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build_zynq::add_linker_script();
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let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
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File::create(out.join("link.x"))
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.unwrap()
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.write_all(include_bytes!("link.x"))
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.unwrap();
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println!("cargo:rustc-link-search={}", out.display());
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// Only re-run the build script when link.x is changed,
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// instead of when any part of the source code changes.
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println!("cargo:rerun-if-changed=link.x");
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build_zynq::cfg();
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build_zynq::cfg();
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}
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}
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@ -0,0 +1,28 @@
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[package]
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authors = ["M-Labs"]
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name = "satman"
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version = "0.0.0"
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build = "build.rs"
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[features]
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target_zc706 = ["libboard_zynq/target_zc706", "libsupport_zynq/target_zc706", "libconfig/target_zc706", "libboard_artiq/target_zc706"]
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target_kasli_soc = ["libboard_zynq/target_kasli_soc", "libsupport_zynq/target_kasli_soc", "libconfig/target_kasli_soc", "libboard_artiq/target_kasli_soc"]
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default = ["target_zc706", ]
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[build-dependencies]
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build_zynq = { path = "../libbuild_zynq" }
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[dependencies]
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log = { version = "0.4", default-features = false }
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embedded-hal = "0.2"
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libboard_zynq = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["ipv6"]}
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libsupport_zynq = { default-features = false, features = ["alloc_core"], git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libcortex_a9 = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libasync = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libregister = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git" }
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libconfig = { git = "https://git.m-labs.hk/M-Labs/zynq-rs.git", features = ["ipv6"] }
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libboard_artiq = { path = "../libboard_artiq" }
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unwind = { path = "../libunwind" }
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libc = { path = "../libc" }
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@ -0,0 +1,6 @@
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extern crate build_zynq;
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fn main() {
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build_zynq::add_linker_script();
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build_zynq::cfg();
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}
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@ -0,0 +1,626 @@
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#![no_std]
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#![no_main]
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#![feature(never_type, panic_info_message, asm, naked_functions)]
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#![feature(alloc_error_handler)]
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#[macro_use]
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extern crate log;
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extern crate embedded_hal;
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extern crate libboard_zynq;
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extern crate libboard_artiq;
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extern crate libsupport_zynq;
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extern crate libcortex_a9;
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extern crate libregister;
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extern crate unwind;
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extern crate alloc;
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use libboard_zynq::{i2c::I2c, timer::GlobalTimer, time::Milliseconds, print, println, mpcore, gic, stdio};
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use libsupport_zynq::ram;
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#[cfg(has_si5324)]
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use libboard_artiq::si5324;
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use libboard_artiq::{pl::csr, drtio_routing, drtioaux, logger, identifier_read, init_gateware};
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use libcortex_a9::{spin_lock_yield, interrupt_handler, regs::{MPIDR, SP}, notify_spin_lock, asm, l2c::enable_l2_cache};
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use libregister::{RegisterW, RegisterR};
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use embedded_hal::blocking::delay::DelayUs;
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use core::sync::atomic::{AtomicBool, Ordering};
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mod repeater;
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fn drtiosat_reset(reset: bool) {
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unsafe {
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csr::drtiosat::reset_write(if reset { 1 } else { 0 });
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}
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}
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fn drtiosat_reset_phy(reset: bool) {
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unsafe {
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csr::drtiosat::reset_phy_write(if reset { 1 } else { 0 });
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}
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}
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fn drtiosat_link_rx_up() -> bool {
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unsafe {
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csr::drtiosat::rx_up_read() == 1
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}
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}
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fn drtiosat_tsc_loaded() -> bool {
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unsafe {
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let tsc_loaded = csr::drtiosat::tsc_loaded_read() == 1;
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if tsc_loaded {
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csr::drtiosat::tsc_loaded_write(1);
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}
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tsc_loaded
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}
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}
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#[cfg(has_drtio_routing)]
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macro_rules! forward {
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($routing_table:expr, $destination:expr, $rank:expr, $repeaters:expr, $packet:expr, $timer:expr) => {{
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let hop = $routing_table.0[$destination as usize][$rank as usize];
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if hop != 0 {
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let repno = (hop - 1) as usize;
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if repno < $repeaters.len() {
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return $repeaters[repno].aux_forward($packet, $timer);
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} else {
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return Err(drtioaux::Error::RoutingError);
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}
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}
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}}
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}
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#[cfg(not(has_drtio_routing))]
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macro_rules! forward {
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($routing_table:expr, $destination:expr, $rank:expr, $repeaters:expr, $packet:expr, $timer:expr) => {}
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}
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fn process_aux_packet(_repeaters: &mut [repeater::Repeater],
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_routing_table: &mut drtio_routing::RoutingTable, _rank: &mut u8,
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packet: drtioaux::Packet, timer: &mut GlobalTimer, i2c: &mut I2c) -> Result<(), drtioaux::Error> {
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// In the code below, *_chan_sel_write takes an u8 if there are fewer than 256 channels,
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// and u16 otherwise; hence the `as _` conversion.
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match packet {
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drtioaux::Packet::EchoRequest =>
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drtioaux::send(0, &drtioaux::Packet::EchoReply),
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drtioaux::Packet::ResetRequest => {
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info!("resetting RTIO");
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drtiosat_reset(true);
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timer.delay_us(100);
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drtiosat_reset(false);
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for rep in _repeaters.iter() {
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if let Err(e) = rep.rtio_reset(timer) {
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error!("failed to issue RTIO reset ({:?})", e);
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}
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}
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drtioaux::send(0, &drtioaux::Packet::ResetAck)
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},
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drtioaux::Packet::DestinationStatusRequest { destination: _destination } => {
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#[cfg(has_drtio_routing)]
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let hop = _routing_table.0[_destination as usize][*_rank as usize];
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#[cfg(not(has_drtio_routing))]
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let hop = 0;
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if hop == 0 {
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let errors;
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unsafe {
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errors = csr::drtiosat::rtio_error_read();
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}
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if errors & 1 != 0 {
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let channel;
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unsafe {
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channel = csr::drtiosat::sequence_error_channel_read();
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csr::drtiosat::rtio_error_write(1);
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}
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drtioaux::send(0,
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&drtioaux::Packet::DestinationSequenceErrorReply { channel })?;
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} else if errors & 2 != 0 {
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let channel;
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unsafe {
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channel = csr::drtiosat::collision_channel_read();
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csr::drtiosat::rtio_error_write(2);
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}
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drtioaux::send(0,
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&drtioaux::Packet::DestinationCollisionReply { channel })?;
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} else if errors & 4 != 0 {
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let channel;
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unsafe {
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channel = csr::drtiosat::busy_channel_read();
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csr::drtiosat::rtio_error_write(4);
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}
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drtioaux::send(0,
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&drtioaux::Packet::DestinationBusyReply { channel })?;
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}
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else {
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drtioaux::send(0, &drtioaux::Packet::DestinationOkReply)?;
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}
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}
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#[cfg(has_drtio_routing)]
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{
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if hop != 0 {
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let hop = hop as usize;
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if hop <= csr::DRTIOREP.len() {
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let repno = hop - 1;
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match _repeaters[repno].aux_forward(&drtioaux::Packet::DestinationStatusRequest {
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destination: _destination
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}, timer) {
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Ok(()) => (),
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Err(drtioaux::Error::LinkDown) => drtioaux::send(0, &drtioaux::Packet::DestinationDownReply)?,
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Err(e) => {
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drtioaux::send(0, &drtioaux::Packet::DestinationDownReply)?;
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error!("aux error when handling destination status request: {:?}", e);
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},
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}
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} else {
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drtioaux::send(0, &drtioaux::Packet::DestinationDownReply)?;
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}
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}
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}
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Ok(())
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}
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#[cfg(has_drtio_routing)]
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drtioaux::Packet::RoutingSetPath { destination, hops } => {
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_routing_table.0[destination as usize] = hops;
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for rep in _repeaters.iter() {
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if let Err(e) = rep.set_path(destination, &hops, timer) {
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error!("failed to set path ({:?})", e);
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}
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}
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drtioaux::send(0, &drtioaux::Packet::RoutingAck)
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}
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#[cfg(has_drtio_routing)]
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drtioaux::Packet::RoutingSetRank { rank } => {
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*_rank = rank;
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drtio_routing::interconnect_enable_all(_routing_table, rank);
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let rep_rank = rank + 1;
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for rep in _repeaters.iter() {
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if let Err(e) = rep.set_rank(rep_rank, timer) {
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error!("failed to set rank ({:?})", e);
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}
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}
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info!("rank: {}", rank);
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info!("routing table: {}", _routing_table);
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drtioaux::send(0, &drtioaux::Packet::RoutingAck)
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}
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#[cfg(not(has_drtio_routing))]
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drtioaux::Packet::RoutingSetPath { destination: _, hops: _ } => {
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drtioaux::send(0, &drtioaux::Packet::RoutingAck)
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}
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#[cfg(not(has_drtio_routing))]
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drtioaux::Packet::RoutingSetRank { rank: _ } => {
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drtioaux::send(0, &drtioaux::Packet::RoutingAck)
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}
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drtioaux::Packet::MonitorRequest { destination: _destination, channel: _channel, probe: _probe } => {
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forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
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let value;
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#[cfg(has_rtio_moninj)]
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unsafe {
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csr::rtio_moninj::mon_chan_sel_write(channel as _);
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csr::rtio_moninj::mon_probe_sel_write(probe);
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csr::rtio_moninj::mon_value_update_write(1);
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value = csr::rtio_moninj::mon_value_read();
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}
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#[cfg(not(has_rtio_moninj))]
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{
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value = 0;
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}
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||||||
|
let reply = drtioaux::Packet::MonitorReply { value: value as u32 };
|
||||||
|
drtioaux::send(0, &reply)
|
||||||
|
},
|
||||||
|
drtioaux::Packet::InjectionRequest { destination: _destination, channel: _channel,
|
||||||
|
overrd: _overrd, value: _value } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
#[cfg(has_rtio_moninj)]
|
||||||
|
unsafe {
|
||||||
|
csr::rtio_moninj::inj_chan_sel_write(channel as _);
|
||||||
|
csr::rtio_moninj::inj_override_sel_write(overrd);
|
||||||
|
csr::rtio_moninj::inj_value_write(value);
|
||||||
|
}
|
||||||
|
Ok(())
|
||||||
|
},
|
||||||
|
drtioaux::Packet::InjectionStatusRequest { destination: _destination,
|
||||||
|
channel: _channel, overrd: _overrd } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
let value;
|
||||||
|
#[cfg(has_rtio_moninj)]
|
||||||
|
unsafe {
|
||||||
|
csr::rtio_moninj::inj_chan_sel_write(channel as _);
|
||||||
|
csr::rtio_moninj::inj_override_sel_write(overrd);
|
||||||
|
value = csr::rtio_moninj::inj_value_read();
|
||||||
|
}
|
||||||
|
#[cfg(not(has_rtio_moninj))]
|
||||||
|
{
|
||||||
|
value = 0;
|
||||||
|
}
|
||||||
|
drtioaux::send(0, &drtioaux::Packet::InjectionStatusReply { value: value })
|
||||||
|
},
|
||||||
|
|
||||||
|
drtioaux::Packet::I2cStartRequest { destination: _destination, busno: _busno } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
let succeeded = i2c.start().is_ok();
|
||||||
|
drtioaux::send(0, &drtioaux::Packet::I2cBasicReply { succeeded: succeeded })
|
||||||
|
}
|
||||||
|
drtioaux::Packet::I2cRestartRequest { destination: _destination, busno: _busno } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
let succeeded = i2c.restart().is_ok();
|
||||||
|
drtioaux::send(0, &drtioaux::Packet::I2cBasicReply { succeeded: succeeded })
|
||||||
|
}
|
||||||
|
drtioaux::Packet::I2cStopRequest { destination: _destination, busno: _busno } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
let succeeded = i2c.stop().is_ok();
|
||||||
|
drtioaux::send(0, &drtioaux::Packet::I2cBasicReply { succeeded: succeeded })
|
||||||
|
}
|
||||||
|
drtioaux::Packet::I2cWriteRequest { destination: _destination, busno: _busno, data } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
match i2c.write(data) {
|
||||||
|
Ok(ack) => drtioaux::send(0,
|
||||||
|
&drtioaux::Packet::I2cWriteReply { succeeded: true, ack: ack }),
|
||||||
|
Err(_) => drtioaux::send(0,
|
||||||
|
&drtioaux::Packet::I2cWriteReply { succeeded: false, ack: false })
|
||||||
|
}
|
||||||
|
}
|
||||||
|
drtioaux::Packet::I2cReadRequest { destination: _destination, busno: _busno, ack } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
match i2c.read(ack) {
|
||||||
|
Ok(data) => drtioaux::send(0,
|
||||||
|
&drtioaux::Packet::I2cReadReply { succeeded: true, data: data }),
|
||||||
|
Err(_) => drtioaux::send(0,
|
||||||
|
&drtioaux::Packet::I2cReadReply { succeeded: false, data: 0xff })
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
drtioaux::Packet::SpiSetConfigRequest { destination: _destination, busno: _busno,
|
||||||
|
flags: _flags, length: _length, div: _div, cs: _cs } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
// todo: reimplement when/if SPI is available
|
||||||
|
//let succeeded = spi::set_config(busno, flags, length, div, cs).is_ok();
|
||||||
|
drtioaux::send(0,
|
||||||
|
&drtioaux::Packet::SpiBasicReply { succeeded: false })
|
||||||
|
},
|
||||||
|
drtioaux::Packet::SpiWriteRequest { destination: _destination, busno: _busno, data: _data } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
// todo: reimplement when/if SPI is available
|
||||||
|
//let succeeded = spi::write(busno, data).is_ok();
|
||||||
|
drtioaux::send(0,
|
||||||
|
&drtioaux::Packet::SpiBasicReply { succeeded: false })
|
||||||
|
}
|
||||||
|
drtioaux::Packet::SpiReadRequest { destination: _destination, busno: _busno } => {
|
||||||
|
forward!(_routing_table, _destination, *_rank, _repeaters, &packet, timer);
|
||||||
|
// todo: reimplement when/if SPI is available
|
||||||
|
// match spi::read(busno) {
|
||||||
|
// Ok(data) => drtioaux::send(0,
|
||||||
|
// &drtioaux::Packet::SpiReadReply { succeeded: true, data: data }),
|
||||||
|
// Err(_) => drtioaux::send(0,
|
||||||
|
// &drtioaux::Packet::SpiReadReply { succeeded: false, data: 0 })
|
||||||
|
// }
|
||||||
|
drtioaux::send(0,
|
||||||
|
&drtioaux::Packet::SpiReadReply { succeeded: false, data: 0 })
|
||||||
|
}
|
||||||
|
|
||||||
|
_ => {
|
||||||
|
warn!("received unexpected aux packet");
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn process_aux_packets(repeaters: &mut [repeater::Repeater],
|
||||||
|
routing_table: &mut drtio_routing::RoutingTable, rank: &mut u8,
|
||||||
|
timer: &mut GlobalTimer, i2c: &mut I2c) {
|
||||||
|
let result =
|
||||||
|
drtioaux::recv(0).and_then(|packet| {
|
||||||
|
if let Some(packet) = packet {
|
||||||
|
process_aux_packet(repeaters, routing_table, rank, packet, timer, i2c)
|
||||||
|
} else {
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
});
|
||||||
|
match result {
|
||||||
|
Ok(()) => (),
|
||||||
|
Err(e) => warn!("aux packet error ({:?})", e)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn drtiosat_process_errors() {
|
||||||
|
let errors;
|
||||||
|
unsafe {
|
||||||
|
errors = csr::drtiosat::protocol_error_read();
|
||||||
|
}
|
||||||
|
if errors & 1 != 0 {
|
||||||
|
error!("received packet of an unknown type");
|
||||||
|
}
|
||||||
|
if errors & 2 != 0 {
|
||||||
|
error!("received truncated packet");
|
||||||
|
}
|
||||||
|
if errors & 4 != 0 {
|
||||||
|
let destination;
|
||||||
|
unsafe {
|
||||||
|
destination = csr::drtiosat::buffer_space_timeout_dest_read();
|
||||||
|
}
|
||||||
|
error!("timeout attempting to get buffer space from CRI, destination=0x{:02x}", destination)
|
||||||
|
}
|
||||||
|
if errors & 8 != 0 {
|
||||||
|
let channel;
|
||||||
|
let timestamp_event;
|
||||||
|
let timestamp_counter;
|
||||||
|
unsafe {
|
||||||
|
channel = csr::drtiosat::underflow_channel_read();
|
||||||
|
timestamp_event = csr::drtiosat::underflow_timestamp_event_read() as i64;
|
||||||
|
timestamp_counter = csr::drtiosat::underflow_timestamp_counter_read() as i64;
|
||||||
|
}
|
||||||
|
error!("write underflow, channel={}, timestamp={}, counter={}, slack={}",
|
||||||
|
channel, timestamp_event, timestamp_counter, timestamp_event-timestamp_counter);
|
||||||
|
}
|
||||||
|
if errors & 16 != 0 {
|
||||||
|
error!("write overflow");
|
||||||
|
}
|
||||||
|
unsafe {
|
||||||
|
csr::drtiosat::protocol_error_write(errors);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
#[cfg(has_rtio_crg)]
|
||||||
|
fn init_rtio_crg(timer: GlobalTimer) {
|
||||||
|
unsafe {
|
||||||
|
csr::rtio_crg::pll_reset_write(0);
|
||||||
|
}
|
||||||
|
timer.delay_us(150);
|
||||||
|
let locked = unsafe { csr::rtio_crg::pll_locked_read() != 0 };
|
||||||
|
if !locked {
|
||||||
|
error!("RTIO clock failed");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(not(has_rtio_crg))]
|
||||||
|
fn init_rtio_crg(_timer: GlobalTimer) { }
|
||||||
|
|
||||||
|
fn hardware_tick(ts: &mut u64, timer: &mut GlobalTimer) {
|
||||||
|
let now = timer.get_time();
|
||||||
|
let mut ts_ms = Milliseconds(*ts);
|
||||||
|
if now > ts_ms {
|
||||||
|
ts_ms = now + Milliseconds(200);
|
||||||
|
*ts = ts_ms.0;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(has_si5324)]
|
||||||
|
const SI5324_SETTINGS: si5324::FrequencySettings
|
||||||
|
= si5324::FrequencySettings {
|
||||||
|
n1_hs : 5,
|
||||||
|
nc1_ls : 8,
|
||||||
|
n2_hs : 7,
|
||||||
|
n2_ls : 360,
|
||||||
|
n31 : 63,
|
||||||
|
n32 : 63,
|
||||||
|
bwsel : 4,
|
||||||
|
crystal_ref: true
|
||||||
|
};
|
||||||
|
|
||||||
|
static mut LOG_BUFFER: [u8; 1<<17] = [0; 1<<17];
|
||||||
|
|
||||||
|
#[no_mangle]
|
||||||
|
pub extern fn main_core0() -> i32 {
|
||||||
|
enable_l2_cache(0x8);
|
||||||
|
|
||||||
|
let mut timer = GlobalTimer::start();
|
||||||
|
|
||||||
|
let buffer_logger = unsafe {
|
||||||
|
logger::BufferLogger::new(&mut LOG_BUFFER[..])
|
||||||
|
};
|
||||||
|
buffer_logger.set_uart_log_level(log::LevelFilter::Info);
|
||||||
|
buffer_logger.register();
|
||||||
|
log::set_max_level(log::LevelFilter::Info);
|
||||||
|
|
||||||
|
init_gateware();
|
||||||
|
|
||||||
|
info!("ARTIQ satellite manager starting...");
|
||||||
|
info!("gateware ident {}", identifier_read(&mut [0; 64]));
|
||||||
|
|
||||||
|
ram::init_alloc_core0();
|
||||||
|
|
||||||
|
let mut i2c = I2c::i2c0();
|
||||||
|
i2c.init().expect("I2C initialization failed");
|
||||||
|
|
||||||
|
#[cfg(has_si5324)]
|
||||||
|
si5324::setup(&mut i2c, &SI5324_SETTINGS, si5324::Input::Ckin1, &mut timer).expect("cannot initialize Si5324");
|
||||||
|
|
||||||
|
unsafe {
|
||||||
|
csr::drtio_transceiver::stable_clkin_write(1);
|
||||||
|
}
|
||||||
|
timer.delay_us(1500); // wait for CPLL/QPLL lock
|
||||||
|
|
||||||
|
unsafe {
|
||||||
|
csr::drtio_transceiver::txenable_write(0xffffffffu32 as _);
|
||||||
|
}
|
||||||
|
init_rtio_crg(timer);
|
||||||
|
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
let mut repeaters = [repeater::Repeater::default(); csr::DRTIOREP.len()];
|
||||||
|
#[cfg(not(has_drtio_routing))]
|
||||||
|
let mut repeaters = [repeater::Repeater::default(); 0];
|
||||||
|
for i in 0..repeaters.len() {
|
||||||
|
repeaters[i] = repeater::Repeater::new(i as u8);
|
||||||
|
}
|
||||||
|
let mut routing_table = drtio_routing::RoutingTable::default_empty();
|
||||||
|
let mut rank = 1;
|
||||||
|
|
||||||
|
let mut hardware_tick_ts = 0;
|
||||||
|
|
||||||
|
loop {
|
||||||
|
while !drtiosat_link_rx_up() {
|
||||||
|
drtiosat_process_errors();
|
||||||
|
#[allow(unused_mut)]
|
||||||
|
for mut rep in repeaters.iter_mut() {
|
||||||
|
rep.service(&routing_table, rank, &mut timer);
|
||||||
|
}
|
||||||
|
hardware_tick(&mut hardware_tick_ts, &mut timer);
|
||||||
|
}
|
||||||
|
|
||||||
|
info!("uplink is up, switching to recovered clock");
|
||||||
|
#[cfg(has_siphaser)]
|
||||||
|
{
|
||||||
|
si5324::siphaser::select_recovered_clock(&mut i2c, true, &mut timer).expect("failed to switch clocks");
|
||||||
|
si5324::siphaser::calibrate_skew(&mut timer).expect("failed to calibrate skew");
|
||||||
|
}
|
||||||
|
|
||||||
|
drtioaux::reset(0);
|
||||||
|
drtiosat_reset(false);
|
||||||
|
drtiosat_reset_phy(false);
|
||||||
|
|
||||||
|
while drtiosat_link_rx_up() {
|
||||||
|
drtiosat_process_errors();
|
||||||
|
process_aux_packets(&mut repeaters, &mut routing_table, &mut rank, &mut timer, &mut i2c);
|
||||||
|
#[allow(unused_mut)]
|
||||||
|
for mut rep in repeaters.iter_mut() {
|
||||||
|
rep.service(&routing_table, rank, &mut timer);
|
||||||
|
}
|
||||||
|
hardware_tick(&mut hardware_tick_ts, &mut timer);
|
||||||
|
if drtiosat_tsc_loaded() {
|
||||||
|
info!("TSC loaded from uplink");
|
||||||
|
for rep in repeaters.iter() {
|
||||||
|
if let Err(e) = rep.sync_tsc(&mut timer) {
|
||||||
|
error!("failed to sync TSC ({:?})", e);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
if let Err(e) = drtioaux::send(0, &drtioaux::Packet::TSCAck) {
|
||||||
|
error!("aux packet error: {:?}", e);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
drtiosat_reset_phy(true);
|
||||||
|
drtiosat_reset(true);
|
||||||
|
drtiosat_tsc_loaded();
|
||||||
|
info!("uplink is down, switching to local oscillator clock");
|
||||||
|
#[cfg(has_siphaser)]
|
||||||
|
si5324::siphaser::select_recovered_clock(&mut i2c, false, &mut timer).expect("failed to switch clocks");
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
extern "C" {
|
||||||
|
static mut __stack1_start: u32;
|
||||||
|
}
|
||||||
|
|
||||||
|
interrupt_handler!(IRQ, irq, __irq_stack0_start, __irq_stack1_start, {
|
||||||
|
if MPIDR.read().cpu_id() == 1{
|
||||||
|
let mpcore = mpcore::RegisterBlock::mpcore();
|
||||||
|
let mut gic = gic::InterruptController::gic(mpcore);
|
||||||
|
let id = gic.get_interrupt_id();
|
||||||
|
if id.0 == 0 {
|
||||||
|
gic.end_interrupt(id);
|
||||||
|
asm::exit_irq();
|
||||||
|
SP.write(&mut __stack1_start as *mut _ as u32);
|
||||||
|
asm::enable_irq();
|
||||||
|
CORE1_RESTART.store(false, Ordering::Relaxed);
|
||||||
|
notify_spin_lock();
|
||||||
|
main_core1();
|
||||||
|
}
|
||||||
|
stdio::drop_uart();
|
||||||
|
}
|
||||||
|
loop {}
|
||||||
|
});
|
||||||
|
|
||||||
|
static mut PANICKED: [bool; 2] = [false; 2];
|
||||||
|
|
||||||
|
static CORE1_RESTART: AtomicBool = AtomicBool::new(false);
|
||||||
|
|
||||||
|
pub fn restart_core1() {
|
||||||
|
let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::mpcore());
|
||||||
|
CORE1_RESTART.store(true, Ordering::Relaxed);
|
||||||
|
interrupt_controller.send_sgi(gic::InterruptId(0), gic::CPUCore::Core1.into());
|
||||||
|
while CORE1_RESTART.load(Ordering::Relaxed) {
|
||||||
|
spin_lock_yield();
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[no_mangle]
|
||||||
|
pub fn main_core1() {
|
||||||
|
let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::mpcore());
|
||||||
|
interrupt_controller.enable_interrupts();
|
||||||
|
|
||||||
|
loop {}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[no_mangle]
|
||||||
|
pub extern fn exception(_vect: u32, _regs: *const u32, pc: u32, ea: u32) {
|
||||||
|
|
||||||
|
fn hexdump(addr: u32) {
|
||||||
|
let addr = (addr - addr % 4) as *const u32;
|
||||||
|
let mut ptr = addr;
|
||||||
|
println!("@ {:08p}", ptr);
|
||||||
|
for _ in 0..4 {
|
||||||
|
print!("+{:04x}: ", ptr as usize - addr as usize);
|
||||||
|
print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
|
||||||
|
print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
|
||||||
|
print!("{:08x} ", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
|
||||||
|
print!("{:08x}\n", unsafe { *ptr }); ptr = ptr.wrapping_offset(1);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
hexdump(pc);
|
||||||
|
hexdump(ea);
|
||||||
|
panic!("exception at PC 0x{:x}, EA 0x{:x}", pc, ea)
|
||||||
|
}
|
||||||
|
|
||||||
|
#[no_mangle] // https://github.com/rust-lang/rust/issues/{38281,51647}
|
||||||
|
#[panic_handler]
|
||||||
|
pub fn panic_fmt(info: &core::panic::PanicInfo) -> ! {
|
||||||
|
let id = MPIDR.read().cpu_id() as usize;
|
||||||
|
print!("Core {} ", id);
|
||||||
|
unsafe {
|
||||||
|
if PANICKED[id] {
|
||||||
|
println!("nested panic!");
|
||||||
|
loop {}
|
||||||
|
}
|
||||||
|
PANICKED[id] = true;
|
||||||
|
}
|
||||||
|
print!("panic at ");
|
||||||
|
if let Some(location) = info.location() {
|
||||||
|
print!("{}:{}:{}", location.file(), location.line(), location.column());
|
||||||
|
} else {
|
||||||
|
print!("unknown location");
|
||||||
|
}
|
||||||
|
if let Some(message) = info.message() {
|
||||||
|
println!(": {}", message);
|
||||||
|
} else {
|
||||||
|
println!("");
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
loop {}
|
||||||
|
}
|
||||||
|
|
||||||
|
// linker symbols
|
||||||
|
extern "C" {
|
||||||
|
static __text_start: u32;
|
||||||
|
static __text_end: u32;
|
||||||
|
static __exidx_start: u32;
|
||||||
|
static __exidx_end: u32;
|
||||||
|
}
|
||||||
|
|
||||||
|
#[no_mangle]
|
||||||
|
extern fn dl_unwind_find_exidx(_pc: *const u32, len_ptr: *mut u32) -> *const u32 {
|
||||||
|
let length;
|
||||||
|
let start: *const u32;
|
||||||
|
unsafe {
|
||||||
|
length = (&__exidx_end as *const u32).offset_from(&__exidx_start) as u32;
|
||||||
|
start = &__exidx_start;
|
||||||
|
*len_ptr = length;
|
||||||
|
}
|
||||||
|
start
|
||||||
|
}
|
||||||
|
|
@ -0,0 +1,290 @@
|
||||||
|
use libboard_artiq::{drtioaux, drtio_routing};
|
||||||
|
use libboard_zynq::timer::GlobalTimer;
|
||||||
|
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
use libboard_artiq::{pl::csr};
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
use libboard_zynq::time::Milliseconds;
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
use embedded_hal::prelude::_embedded_hal_blocking_delay_DelayUs;
|
||||||
|
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
fn rep_link_rx_up(repno: u8) -> bool {
|
||||||
|
let repno = repno as usize;
|
||||||
|
unsafe {
|
||||||
|
(csr::DRTIOREP[repno].rx_up_read)() == 1
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
#[derive(Clone, Copy, PartialEq)]
|
||||||
|
enum RepeaterState {
|
||||||
|
Down,
|
||||||
|
SendPing { ping_count: u16 },
|
||||||
|
WaitPingReply { ping_count: u16, timeout: Milliseconds },
|
||||||
|
Up,
|
||||||
|
Failed
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
impl Default for RepeaterState {
|
||||||
|
fn default() -> RepeaterState { RepeaterState::Down }
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
#[derive(Clone, Copy, Default)]
|
||||||
|
pub struct Repeater {
|
||||||
|
repno: u8,
|
||||||
|
auxno: u8,
|
||||||
|
state: RepeaterState
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(has_drtio_routing)]
|
||||||
|
impl Repeater {
|
||||||
|
pub fn new(repno: u8) -> Repeater {
|
||||||
|
Repeater {
|
||||||
|
repno: repno,
|
||||||
|
auxno: repno + 1,
|
||||||
|
state: RepeaterState::Down
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[allow(dead_code)]
|
||||||
|
pub fn is_up(&self) -> bool {
|
||||||
|
self.state == RepeaterState::Up
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn service(&mut self, routing_table: &drtio_routing::RoutingTable, rank: u8,
|
||||||
|
timer: &mut GlobalTimer) {
|
||||||
|
self.process_local_errors();
|
||||||
|
|
||||||
|
match self.state {
|
||||||
|
RepeaterState::Down => {
|
||||||
|
if rep_link_rx_up(self.repno) {
|
||||||
|
info!("[REP#{}] link RX became up, pinging", self.repno);
|
||||||
|
self.state = RepeaterState::SendPing { ping_count: 0 };
|
||||||
|
}
|
||||||
|
}
|
||||||
|
RepeaterState::SendPing { ping_count } => {
|
||||||
|
if rep_link_rx_up(self.repno) {
|
||||||
|
drtioaux::send(self.auxno, &drtioaux::Packet::EchoRequest).unwrap();
|
||||||
|
self.state = RepeaterState::WaitPingReply {
|
||||||
|
ping_count: ping_count + 1,
|
||||||
|
timeout: timer.get_time() + Milliseconds(100)
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
error!("[REP#{}] link RX went down during ping", self.repno);
|
||||||
|
self.state = RepeaterState::Down;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
RepeaterState::WaitPingReply { ping_count, timeout } => {
|
||||||
|
if rep_link_rx_up(self.repno) {
|
||||||
|
if let Ok(Some(drtioaux::Packet::EchoReply)) = drtioaux::recv(self.auxno) {
|
||||||
|
info!("[REP#{}] remote replied after {} packets", self.repno, ping_count);
|
||||||
|
self.state = RepeaterState::Up;
|
||||||
|
if let Err(e) = self.sync_tsc(timer) {
|
||||||
|
error!("[REP#{}] failed to sync TSC ({:?})", self.repno, e);
|
||||||
|
self.state = RepeaterState::Failed;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if let Err(e) = self.load_routing_table(routing_table, timer) {
|
||||||
|
error!("[REP#{}] failed to load routing table ({:?})", self.repno, e);
|
||||||
|
self.state = RepeaterState::Failed;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
if let Err(e) = self.set_rank(rank + 1, timer) {
|
||||||
|
error!("[REP#{}] failed to set rank ({:?})", self.repno, e);
|
||||||
|
self.state = RepeaterState::Failed;
|
||||||
|
return;
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
if timer.get_time() > timeout {
|
||||||
|
if ping_count > 200 {
|
||||||
|
error!("[REP#{}] ping failed", self.repno);
|
||||||
|
self.state = RepeaterState::Failed;
|
||||||
|
} else {
|
||||||
|
self.state = RepeaterState::SendPing { ping_count: ping_count };
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
} else {
|
||||||
|
error!("[REP#{}] link RX went down during ping", self.repno);
|
||||||
|
self.state = RepeaterState::Down;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
RepeaterState::Up => {
|
||||||
|
self.process_unsolicited_aux();
|
||||||
|
if !rep_link_rx_up(self.repno) {
|
||||||
|
info!("[REP#{}] link is down", self.repno);
|
||||||
|
self.state = RepeaterState::Down;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
RepeaterState::Failed => {
|
||||||
|
if !rep_link_rx_up(self.repno) {
|
||||||
|
info!("[REP#{}] link is down", self.repno);
|
||||||
|
self.state = RepeaterState::Down;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn process_unsolicited_aux(&self) {
|
||||||
|
match drtioaux::recv(self.auxno) {
|
||||||
|
Ok(Some(packet)) => warn!("[REP#{}] unsolicited aux packet: {:?}", self.repno, packet),
|
||||||
|
Ok(None) => (),
|
||||||
|
Err(_) => warn!("[REP#{}] aux packet error", self.repno)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn process_local_errors(&self) {
|
||||||
|
let repno = self.repno as usize;
|
||||||
|
let errors;
|
||||||
|
unsafe {
|
||||||
|
errors = (csr::DRTIOREP[repno].protocol_error_read)();
|
||||||
|
}
|
||||||
|
if errors & 1 != 0 {
|
||||||
|
error!("[REP#{}] received packet of an unknown type", repno);
|
||||||
|
}
|
||||||
|
if errors & 2 != 0 {
|
||||||
|
error!("[REP#{}] received truncated packet", repno);
|
||||||
|
}
|
||||||
|
if errors & 4 != 0 {
|
||||||
|
let cmd;
|
||||||
|
let chan_sel;
|
||||||
|
unsafe {
|
||||||
|
cmd = (csr::DRTIOREP[repno].command_missed_cmd_read)();
|
||||||
|
chan_sel = (csr::DRTIOREP[repno].command_missed_chan_sel_read)();
|
||||||
|
}
|
||||||
|
error!("[REP#{}] CRI command missed, cmd={}, chan_sel=0x{:06x}", repno, cmd, chan_sel)
|
||||||
|
}
|
||||||
|
if errors & 8 != 0 {
|
||||||
|
let destination;
|
||||||
|
unsafe {
|
||||||
|
destination = (csr::DRTIOREP[repno].buffer_space_timeout_dest_read)();
|
||||||
|
}
|
||||||
|
error!("[REP#{}] timeout attempting to get remote buffer space, destination=0x{:02x}", repno, destination);
|
||||||
|
}
|
||||||
|
unsafe {
|
||||||
|
(csr::DRTIOREP[repno].protocol_error_write)(errors);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
fn recv_aux_timeout(&self, timeout: u32, timer: &mut GlobalTimer) -> Result<drtioaux::Packet, drtioaux::Error> {
|
||||||
|
let max_time = timer.get_time() + Milliseconds(timeout.into());
|
||||||
|
loop {
|
||||||
|
if !rep_link_rx_up(self.repno) {
|
||||||
|
return Err(drtioaux::Error::LinkDown);
|
||||||
|
}
|
||||||
|
if timer.get_time() > max_time {
|
||||||
|
return Err(drtioaux::Error::TimedOut);
|
||||||
|
}
|
||||||
|
match drtioaux::recv(self.auxno) {
|
||||||
|
Ok(Some(packet)) => return Ok(packet),
|
||||||
|
Ok(None) => (),
|
||||||
|
Err(e) => return Err(e)
|
||||||
|
}
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn aux_forward(&self, request: &drtioaux::Packet, timer: &mut GlobalTimer) -> Result<(), drtioaux::Error> {
|
||||||
|
if self.state != RepeaterState::Up {
|
||||||
|
return Err(drtioaux::Error::LinkDown);
|
||||||
|
}
|
||||||
|
drtioaux::send(self.auxno, request).unwrap();
|
||||||
|
let reply = self.recv_aux_timeout(200, timer)?;
|
||||||
|
drtioaux::send(0, &reply).unwrap();
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn sync_tsc(&self, timer: &mut GlobalTimer) -> Result<(), drtioaux::Error> {
|
||||||
|
if self.state != RepeaterState::Up {
|
||||||
|
return Ok(());
|
||||||
|
}
|
||||||
|
|
||||||
|
let repno = self.repno as usize;
|
||||||
|
unsafe {
|
||||||
|
(csr::DRTIOREP[repno].set_time_write)(1);
|
||||||
|
while (csr::DRTIOREP[repno].set_time_read)() == 1 {}
|
||||||
|
}
|
||||||
|
|
||||||
|
// TSCAck is the only aux packet that is sent spontaneously
|
||||||
|
// by the satellite, in response to a TSC set on the RT link.
|
||||||
|
let reply = self.recv_aux_timeout(10000, timer)?;
|
||||||
|
if reply == drtioaux::Packet::TSCAck {
|
||||||
|
return Ok(());
|
||||||
|
} else {
|
||||||
|
return Err(drtioaux::Error::UnexpectedReply);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn set_path(&self, destination: u8, hops: &[u8; drtio_routing::MAX_HOPS], timer: &mut GlobalTimer) -> Result<(), drtioaux::Error> {
|
||||||
|
if self.state != RepeaterState::Up {
|
||||||
|
return Ok(());
|
||||||
|
}
|
||||||
|
|
||||||
|
drtioaux::send(self.auxno, &drtioaux::Packet::RoutingSetPath {
|
||||||
|
destination: destination,
|
||||||
|
hops: *hops
|
||||||
|
}).unwrap();
|
||||||
|
let reply = self.recv_aux_timeout(200, timer)?;
|
||||||
|
if reply != drtioaux::Packet::RoutingAck {
|
||||||
|
return Err(drtioaux::Error::UnexpectedReply);
|
||||||
|
}
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn load_routing_table(&self, routing_table: &drtio_routing::RoutingTable, timer: &mut GlobalTimer) -> Result<(), drtioaux::Error> {
|
||||||
|
for i in 0..drtio_routing::DEST_COUNT {
|
||||||
|
self.set_path(i as u8, &routing_table.0[i], timer)?;
|
||||||
|
}
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn set_rank(&self, rank: u8, timer: &mut GlobalTimer) -> Result<(), drtioaux::Error> {
|
||||||
|
if self.state != RepeaterState::Up {
|
||||||
|
return Ok(());
|
||||||
|
}
|
||||||
|
drtioaux::send(self.auxno, &drtioaux::Packet::RoutingSetRank {
|
||||||
|
rank: rank
|
||||||
|
}).unwrap();
|
||||||
|
let reply = self.recv_aux_timeout(200, timer)?;
|
||||||
|
if reply != drtioaux::Packet::RoutingAck {
|
||||||
|
return Err(drtioaux::Error::UnexpectedReply);
|
||||||
|
}
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn rtio_reset(&self, timer: &mut GlobalTimer) -> Result<(), drtioaux::Error> {
|
||||||
|
let repno = self.repno as usize;
|
||||||
|
unsafe { (csr::DRTIOREP[repno].reset_write)(1); }
|
||||||
|
timer.delay_us(100);
|
||||||
|
unsafe { (csr::DRTIOREP[repno].reset_write)(0); }
|
||||||
|
|
||||||
|
if self.state != RepeaterState::Up {
|
||||||
|
return Ok(());
|
||||||
|
}
|
||||||
|
|
||||||
|
drtioaux::send(self.auxno, &drtioaux::Packet::ResetRequest).unwrap();
|
||||||
|
let reply = self.recv_aux_timeout(200, timer)?;
|
||||||
|
if reply != drtioaux::Packet::ResetAck {
|
||||||
|
return Err(drtioaux::Error::UnexpectedReply);
|
||||||
|
}
|
||||||
|
Ok(())
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(not(has_drtio_routing))]
|
||||||
|
#[derive(Clone, Copy, Default)]
|
||||||
|
pub struct Repeater {
|
||||||
|
}
|
||||||
|
|
||||||
|
#[cfg(not(has_drtio_routing))]
|
||||||
|
impl Repeater {
|
||||||
|
pub fn new(_repno: u8) -> Repeater { Repeater::default() }
|
||||||
|
|
||||||
|
pub fn service(&self, _routing_table: &drtio_routing::RoutingTable, _rank: u8, _timer: &mut GlobalTimer) { }
|
||||||
|
|
||||||
|
pub fn sync_tsc(&self, _timer: &mut GlobalTimer) -> Result<(), drtioaux::Error> { Ok(()) }
|
||||||
|
|
||||||
|
pub fn rtio_reset(&self, _timer: &mut GlobalTimer) -> Result<(), drtioaux::Error> { Ok(()) }
|
||||||
|
}
|
||||||
Loading…
Reference in New Issue