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Update tx_stm32f407, tcp_stm32f407 examples

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This commit is contained in:
Harry Ho 2020-06-24 11:18:23 +08:00
parent e1c0b0dd23
commit 66f89e8085
2 changed files with 3 additions and 8 deletions
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2
examples/tcp_stm32f407.rs
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@ -86,7 +86,7 @@ fn main() -> ! {
let stim0 = &mut itm.stim[0];
iprintln!(stim0,
"Eth TCP Server on STM32-H407 via NIC100/ENC424J600");
"Eth TCP Server on STM32-F407 via NIC100/ENC424J600");
// NIC100 / ENC424J600 Set-up
let spi1 = dp.SPI1;

9
examples/tx_stm32f407.rs
View File

@ -2,16 +2,14 @@
#![no_main]
extern crate panic_itm;
use cortex_m::{iprint, iprintln};
use cortex_m::iprintln;
use cortex_m_rt::entry;
use embedded_hal::watchdog::{WatchdogEnable, Watchdog};
use embedded_hal::digital::v2::OutputPin;
use embedded_hal::blocking::delay::DelayMs;
use stm32f4xx_hal::{
rcc::RccExt,
gpio::GpioExt,
watchdog::IndependentWatchdog,
time::U32Ext,
stm32::{CorePeripherals, Peripherals},
delay::Delay,
@ -41,7 +39,7 @@ fn main() -> ! {
let stim0 = &mut itm.stim[0];
iprintln!(stim0,
"Eth TX Pinging on STM32-H407 via NIC100/ENC424J600");
"Eth TX Pinging on STM32-F407 via NIC100/ENC424J600");
// NIC100 / ENC424J600 Set-up
let spi1 = dp.SPI1;
@ -71,9 +69,6 @@ fn main() -> ! {
panic!("Ethernet initialisation Failed!")
}
}
delay.delay_ms(1_u32);
iprintln!(stim0,
"- Delayed 1000us (>=256us), PHY regs are now available");
// Read MAC
let mut eth_mac_addr: [u8; 6] = [0; 6];