spi: Add back NSS high delay conditionally based on opcode type

This commit is contained in:
Harry Ho 2021-06-03 11:48:26 +08:00
parent d05d7f91e2
commit 35b7924431
1 changed files with 13 additions and 11 deletions

View File

@ -191,25 +191,27 @@ impl <SPI: Transfer<u8>,
// receiving or sending n*8-bit data. // receiving or sending n*8-bit data.
// The slice of buffer provided must begin with the 8-bit instruction. // The slice of buffer provided must begin with the 8-bit instruction.
// If n = 0, the transfer will only involve sending the instruction. // If n = 0, the transfer will only involve sending the instruction.
fn rw_n<'a>(&mut self, buf: &'a mut [u8], opcode: u8, data_length: usize) fn rw_n<'a>(&mut self, buf: &'a mut [u8], opcode: u8, data_length: usize) -> Result<(), Error> {
-> Result<(), Error> {
assert!(buf.len() > data_length); assert!(buf.len() > data_length);
// Enable chip select // Enable chip select
self.nss.set_low(); self.nss.set_low();
// Start writing to SLAVE // Start writing to SLAVE
buf[0] = opcode; buf[0] = opcode;
match self.spi.transfer(&mut buf[..data_length+1]) { let result = self.spi.transfer(&mut buf[..data_length+1]);
Ok(_) => { match opcode {
opcodes::RCRU | opcodes::WCRU |
opcodes::RRXDATA | opcodes::WGPDATA => {
// Disable chip select // Disable chip select
(self.delay_ns)(60);
self.nss.set_high(); self.nss.set_high();
Ok(()) (self.delay_ns)(30);
},
// TODO: Maybe too naive?
Err(_) => {
// Disable chip select
self.nss.set_high();
Err(Error::TransferError)
} }
_ => { }
}
match result {
Ok(_) => Ok(()),
// TODO: Maybe too naive?
Err(_) => Err(Error::TransferError),
} }
} }
} }