2020-06-24 11:17:12 +08:00
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#![no_std]
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#![no_main]
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extern crate panic_itm;
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2020-12-29 11:08:35 +08:00
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use cortex_m::{iprintln, iprint};
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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use embedded_hal::{
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digital::v2::OutputPin,
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blocking::delay::DelayMs
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};
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2020-06-24 11:17:12 +08:00
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use stm32f4xx_hal::{
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rcc::RccExt,
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gpio::GpioExt,
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time::U32Ext,
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2020-12-29 11:47:02 +08:00
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stm32::ITM,
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2020-12-28 16:01:45 +08:00
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delay::Delay,
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2020-08-24 12:07:45 +08:00
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spi::Spi,
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time::Hertz
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2020-06-24 11:17:12 +08:00
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};
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2021-04-29 17:08:18 +08:00
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use enc424j600::smoltcp_phy;
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2020-06-24 11:17:12 +08:00
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use smoltcp::wire::{
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2020-12-29 11:47:02 +08:00
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EthernetAddress, IpAddress, IpCidr, Ipv6Cidr
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2020-06-24 11:17:12 +08:00
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};
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2020-12-29 11:47:02 +08:00
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use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder, EthernetInterface};
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2020-06-24 11:17:12 +08:00
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use smoltcp::socket::{SocketSet, TcpSocket, TcpSocketBuffer};
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use core::str;
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use core::fmt::Write;
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2020-12-29 11:53:33 +08:00
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/// Timer
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use core::cell::RefCell;
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use cortex_m::interrupt::Mutex;
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use cortex_m_rt::exception;
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use stm32f4xx_hal::{
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rcc::Clocks,
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time::MilliSeconds,
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timer::{Timer, Event as TimerEvent},
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stm32::SYST
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};
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use smoltcp::time::Instant;
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/// Rate in Hz
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const TIMER_RATE: u32 = 20;
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/// Interval duration in milliseconds
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const TIMER_DELTA: u32 = 1000 / TIMER_RATE;
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/// Elapsed time in milliseconds
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static TIMER_MS: Mutex<RefCell<u32>> = Mutex::new(RefCell::new(0));
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/// Setup SysTick exception
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fn timer_setup(syst: SYST, clocks: Clocks) {
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let mut timer = Timer::syst(syst, TIMER_RATE.hz(), clocks);
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timer.listen(TimerEvent::TimeOut);
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}
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/// SysTick exception (Timer)
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#[exception]
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fn SysTick() {
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cortex_m::interrupt::free(|cs| {
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*TIMER_MS.borrow(cs)
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.borrow_mut() += TIMER_DELTA;
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});
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}
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/// Obtain current time in milliseconds
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pub fn timer_now() -> MilliSeconds {
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let ms = cortex_m::interrupt::free(|cs| {
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*TIMER_MS.borrow(cs)
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.borrow()
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});
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ms.ms()
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}
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2020-12-29 11:47:02 +08:00
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///
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2020-06-24 11:17:12 +08:00
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use stm32f4xx_hal::{
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2020-12-29 11:47:02 +08:00
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stm32::SPI1,
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gpio::{
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gpioa::{PA5, PA6, PA7, PA4},
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Alternate, AF5, Output, PushPull
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}
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2020-06-24 11:17:12 +08:00
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};
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2021-04-29 17:08:18 +08:00
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type SpiEth = enc424j600::Enc424j600<
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2020-12-29 11:47:02 +08:00
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Spi<SPI1, (PA5<Alternate<AF5>>, PA6<Alternate<AF5>>, PA7<Alternate<AF5>>)>,
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2021-04-27 16:22:03 +08:00
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PA4<Output<PushPull>>
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2021-01-25 12:35:23 +08:00
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>;
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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pub struct NetStorage {
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ip_addrs: [IpCidr; 1],
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neighbor_cache: [Option<(IpAddress, smoltcp::iface::Neighbor)>; 8],
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2020-06-24 11:17:12 +08:00
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}
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2020-12-29 11:47:02 +08:00
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static mut NET_STORE: NetStorage = NetStorage {
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// Placeholder for the real IP address, which is initialized at runtime.
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ip_addrs: [IpCidr::Ipv6(
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Ipv6Cidr::SOLICITED_NODE_PREFIX,
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)],
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neighbor_cache: [None; 8],
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};
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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#[rtic::app(device = stm32f4xx_hal::stm32, peripherals = true, monotonic = rtic::cyccnt::CYCCNT)]
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const APP: () = {
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struct Resources {
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eth_iface: EthernetInterface<
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'static,
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2021-04-29 17:08:18 +08:00
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smoltcp_phy::SmoltcpDevice<SpiEth>>,
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2020-12-29 11:47:02 +08:00
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itm: ITM
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}
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#[init()]
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fn init(mut c: init::Context) -> init::LateResources {
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c.core.SCB.enable_icache();
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c.core.SCB.enable_dcache(&mut c.core.CPUID);
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// Enable monotonic timer CYCCNT
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c.core.DWT.enable_cycle_counter();
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c.core.DCB.enable_trace();
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let clocks = c.device.RCC.constrain()
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.cfgr
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.sysclk(168.mhz())
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.hclk(168.mhz())
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.pclk1(42.mhz())
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.require_pll48clk()
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.freeze();
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let mut delay = Delay::new(c.core.SYST, clocks);
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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// Init ITM
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let mut itm = c.core.ITM;
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let stim0 = &mut itm.stim[0];
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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iprintln!(stim0,
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"Eth TCP Server on STM32-F407 via NIC100/ENC424J600");
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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// NIC100 / ENC424J600 Set-up
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let spi1 = c.device.SPI1;
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let gpioa = c.device.GPIOA.split();
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// Mapping: see Table 9, STM32F407ZG Manual
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let spi1_sck = gpioa.pa5.into_alternate_af5();
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let spi1_miso = gpioa.pa6.into_alternate_af5();
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let spi1_mosi = gpioa.pa7.into_alternate_af5();
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let spi1_nss = gpioa.pa4.into_push_pull_output();
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// Map SPISEL: see Table 1, NIC100 Manual
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let mut spisel = gpioa.pa1.into_push_pull_output();
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spisel.set_high().unwrap();
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delay.delay_ms(1_u32);
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spisel.set_low().unwrap();
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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// Create SPI1 for HAL
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let eth_iface = {
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let mut spi_eth = {
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let spi_eth_port = Spi::spi1(
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spi1, (spi1_sck, spi1_miso, spi1_mosi),
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enc424j600::spi::interfaces::SPI_MODE,
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Hertz(enc424j600::spi::interfaces::SPI_CLOCK_FREQ),
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clocks);
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2021-01-25 12:35:23 +08:00
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2021-04-27 16:22:03 +08:00
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SpiEth::new(spi_eth_port, spi1_nss)
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.cpu_freq_mhz(168)
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2020-12-29 11:47:02 +08:00
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};
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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// Init controller
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2021-04-27 16:22:03 +08:00
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match spi_eth.reset(&mut delay) {
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2020-12-29 11:47:02 +08:00
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Ok(_) => {
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iprintln!(stim0, "Initializing Ethernet...")
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2020-06-24 14:14:58 +08:00
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}
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2020-12-29 11:47:02 +08:00
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Err(_) => {
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panic!("Ethernet initialization failed!")
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}
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}
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2020-06-24 14:14:58 +08:00
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2020-12-29 11:47:02 +08:00
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// Read MAC
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let mut eth_mac_addr: [u8; 6] = [0; 6];
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2021-04-29 17:08:18 +08:00
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spi_eth.read_mac_addr(&mut eth_mac_addr);
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2020-12-29 11:47:02 +08:00
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for i in 0..6 {
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let byte = eth_mac_addr[i];
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match i {
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0 => iprint!(stim0, "MAC Address = {:02x}-", byte),
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1..=4 => iprint!(stim0, "{:02x}-", byte),
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5 => iprint!(stim0, "{:02x}\n", byte),
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_ => ()
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};
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}
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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// Init Rx/Tx buffers
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spi_eth.init_rxbuf();
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spi_eth.init_txbuf();
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iprintln!(stim0, "Ethernet controller initialized");
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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// Init smoltcp interface
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let eth_iface = {
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let device = smoltcp_phy::SmoltcpDevice::new(spi_eth);
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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let store = unsafe { &mut NET_STORE };
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store.ip_addrs[0] = IpCidr::new(IpAddress::v4(192, 168, 1, 77), 24);
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let neighbor_cache = NeighborCache::new(&mut store.neighbor_cache[..]);
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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EthernetInterfaceBuilder::new(device)
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.ethernet_addr(EthernetAddress(eth_mac_addr))
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.neighbor_cache(neighbor_cache)
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.ip_addrs(&mut store.ip_addrs[..])
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.finalize()
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};
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iprintln!(stim0, "Ethernet interface initialized");
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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eth_iface
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};
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:53:33 +08:00
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// Setup SysTick after releasing SYST from Delay
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// Reference to stm32-eth:examples/ip.rs
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timer_setup(delay.free(), clocks);
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iprintln!(stim0, "Timer initialized");
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2020-12-29 11:47:02 +08:00
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init::LateResources {
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eth_iface,
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itm
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2020-06-24 11:17:12 +08:00
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}
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2020-12-29 11:47:02 +08:00
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}
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#[idle(resources=[eth_iface, itm])]
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fn idle(c: idle::Context) -> ! {
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let stim0 = &mut c.resources.itm.stim[0];
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let iface = c.resources.eth_iface;
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// Copied / modified from smoltcp:
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// examples/loopback.rs
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let echo_socket = {
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static mut TCP_SERVER_RX_DATA: [u8; 1024] = [0; 1024];
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static mut TCP_SERVER_TX_DATA: [u8; 1024] = [0; 1024];
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let tcp_rx_buffer = TcpSocketBuffer::new(unsafe { &mut TCP_SERVER_RX_DATA[..] });
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let tcp_tx_buffer = TcpSocketBuffer::new(unsafe { &mut TCP_SERVER_TX_DATA[..] });
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TcpSocket::new(tcp_rx_buffer, tcp_tx_buffer)
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};
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let greet_socket = {
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static mut TCP_SERVER_RX_DATA: [u8; 256] = [0; 256];
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static mut TCP_SERVER_TX_DATA: [u8; 256] = [0; 256];
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let tcp_rx_buffer = TcpSocketBuffer::new(unsafe { &mut TCP_SERVER_RX_DATA[..] });
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let tcp_tx_buffer = TcpSocketBuffer::new(unsafe { &mut TCP_SERVER_TX_DATA[..] });
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TcpSocket::new(tcp_rx_buffer, tcp_tx_buffer)
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};
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let mut socket_set_entries = [None, None];
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let mut socket_set = SocketSet::new(&mut socket_set_entries[..]);
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let echo_handle = socket_set.add(echo_socket);
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let greet_handle = socket_set.add(greet_socket);
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2020-06-24 11:17:12 +08:00
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{
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2020-12-29 11:47:02 +08:00
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let store = unsafe { &mut NET_STORE };
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iprintln!(stim0,
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"TCP sockets will listen at {}", store.ip_addrs[0].address());
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}
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// Copied / modified from:
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// smoltcp:examples/loopback.rs, examples/server.rs;
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// stm32-eth:examples/ip.rs,
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// git.m-labs.hk/M-Labs/tnetplug
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loop {
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// Poll
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2020-12-29 11:53:33 +08:00
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let now = timer_now().0;
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let instant = Instant::from_millis(now as i64);
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2020-12-29 11:47:02 +08:00
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match iface.poll(&mut socket_set, instant) {
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Ok(_) => {
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},
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Err(e) => {
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iprintln!(stim0, "[{}] Poll error: {:?}", instant, e)
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}
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2020-06-24 11:17:12 +08:00
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}
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2020-12-29 11:47:02 +08:00
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// Control the "echoing" socket (:1234)
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{
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let mut socket = socket_set.get::<TcpSocket>(echo_handle);
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if !socket.is_open() {
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iprintln!(stim0,
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"[{}] Listening to port 1234 for echoing, time-out in 10s", instant);
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socket.listen(1234).unwrap();
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socket.set_timeout(Some(smoltcp::time::Duration::from_millis(10000)));
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}
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if socket.can_recv() {
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iprintln!(stim0,
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"[{}] Received packet: {:?}", instant, socket.recv(|buffer| {
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(buffer.len(), str::from_utf8(buffer).unwrap())
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}));
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}
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2020-06-24 11:17:12 +08:00
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}
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2020-12-29 11:47:02 +08:00
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// Control the "greeting" socket (:4321)
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{
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let mut socket = socket_set.get::<TcpSocket>(greet_handle);
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if !socket.is_open() {
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iprintln!(stim0,
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"[{}] Listening to port 4321 for greeting, \
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please connect to the port", instant);
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socket.listen(4321).unwrap();
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}
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2020-06-24 11:17:12 +08:00
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2020-12-29 11:47:02 +08:00
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if socket.can_send() {
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let greeting = "Welcome to the server demo for STM32-F407!";
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write!(socket, "{}\n", greeting).unwrap();
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iprintln!(stim0,
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"[{}] Greeting sent, socket closed", instant);
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socket.close();
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}
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2020-06-24 11:17:12 +08:00
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}
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}
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}
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2020-12-29 11:47:02 +08:00
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extern "C" {
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fn EXTI0();
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}
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};
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