newell
/
zynq-rs
forked from M-Labs/zynq-rs
1
0
Fork 0
Code Pull Requests Activity

zynq::slcr: doc, fix

This commit is contained in:
Astro 2019-10-25 23:18:18 +02:00
parent a4d3360a70
commit e61d1268ac
1 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

4
src/zynq/slcr.rs
View File

@ -247,6 +247,8 @@ pub struct RegisterBlock {
register_at!(RegisterBlock, 0xF8000000, new); register_at!(RegisterBlock, 0xF8000000, new);
impl RegisterBlock { impl RegisterBlock {
/// Required to modify these sclr registers: scl, pss_rst_ctrl,
/// apu_ctrl, and wdt_clk_sel
pub fn unlocked<F: FnMut(&mut Self) -> R, R>(mut f: F) -> R { pub fn unlocked<F: FnMut(&mut Self) -> R, R>(mut f: F) -> R {
let mut self_ = Self::new(); let mut self_ = Self::new();
self_.slcr_unlock.unlock(); self_.slcr_unlock.unlock();
@ -287,7 +289,7 @@ impl SlcrUnlock {
} }
register!(pll_ctrl, PllCtrl, RW, u32); register!(pll_ctrl, PllCtrl, RW, u32);
register_bits!(pll_ctrl, pll_fdiv, u8, 12, 18); register_bits!(pll_ctrl, pll_fdiv, u16, 12, 18);
register_bit!(pll_ctrl, pll_bypass_force, 4); register_bit!(pll_ctrl, pll_bypass_force, 4);
register_bit!(pll_ctrl, pll_bypass_qual, 3); register_bit!(pll_ctrl, pll_bypass_qual, 3);
register_bit!(pll_ctrl, pll_pwrdwn, 1); register_bit!(pll_ctrl, pll_pwrdwn, 1);