forked from M-Labs/zynq-rs
zynq::slcr: implement boot_mode bits
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6ffcf7d4a4
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8037042040
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@ -134,7 +134,7 @@ pub struct RegisterBlock {
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pub rs_awdt_ctrl: RW<u32>,
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pub rs_awdt_ctrl: RW<u32>,
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reserved6: [u32; 2],
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reserved6: [u32; 2],
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pub reboot_status: RW<u32>,
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pub reboot_status: RW<u32>,
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pub boot_mode: RW<u32>,
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pub boot_mode: BootMode,
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reserved7: [u32; 40],
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reserved7: [u32; 40],
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pub apu_ctrl: RW<u32>,
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pub apu_ctrl: RW<u32>,
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pub wdt_clk_sel: RW<u32>,
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pub wdt_clk_sel: RW<u32>,
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@ -447,6 +447,20 @@ register_bit!(a9_cpu_rst_ctrl, a9_clkstop0, 4);
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register_bit!(a9_cpu_rst_ctrl, a9_rst1, 1);
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register_bit!(a9_cpu_rst_ctrl, a9_rst1, 1);
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register_bit!(a9_cpu_rst_ctrl, a9_rst0, 0);
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register_bit!(a9_cpu_rst_ctrl, a9_rst0, 0);
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#[derive(Clone, Copy, Debug, PartialEq)]
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#[repr(u8)]
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pub enum BootModePins {
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Jtag = 0b000,
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Nor = 0b001,
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Nand = 0b010,
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QuadSpi = 0b100,
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SdCard = 0b110,
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}
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register!(boot_mode, BootMode, RO, u32);
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register_bit!(boot_mode, pll_bypass, 4);
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register_bits_typed!(boot_mode, boot_mode_pins, u8, BootModePins, 0, 3);
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register!(pss_rst_ctrl, PssRstCtrl, RW, u32);
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register!(pss_rst_ctrl, PssRstCtrl, RW, u32);
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register_bit!(pss_rst_ctrl, soft_rst, 1);
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register_bit!(pss_rst_ctrl, soft_rst, 1);
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