forked from M-Labs/zynq-rs
parent
7681745282
commit
06c646e61f
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@ -1,6 +1,8 @@
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#![no_std]
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#![no_std]
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#![no_main]
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#![no_main]
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#![feature(const_in_array_repeat_expressions)]
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#![feature(const_in_array_repeat_expressions)]
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#![feature(naked_functions)]
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#![feature(asm)]
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extern crate alloc;
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extern crate alloc;
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@ -33,7 +35,7 @@ use libcortex_a9::{
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sync_channel,
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sync_channel,
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regs::{MPIDR, SP},
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regs::{MPIDR, SP},
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spin_lock_yield, notify_spin_lock,
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spin_lock_yield, notify_spin_lock,
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asm
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asm, interrupt_handler
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};
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};
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use libregister::{RegisterR, RegisterW};
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use libregister::{RegisterR, RegisterW};
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use libsupport_zynq::{
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use libsupport_zynq::{
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@ -53,9 +55,7 @@ extern "C" {
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static CORE1_RESTART: AtomicBool = AtomicBool::new(false);
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static CORE1_RESTART: AtomicBool = AtomicBool::new(false);
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#[link_section = ".text.boot"]
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interrupt_handler!(IRQ, irq, __stack0_start, __stack1_start, {
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#[no_mangle]
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pub unsafe extern "C" fn IRQ() {
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if MPIDR.read().cpu_id() == 1{
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if MPIDR.read().cpu_id() == 1{
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let mpcore = mpcore::RegisterBlock::mpcore();
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let mpcore = mpcore::RegisterBlock::mpcore();
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let mut gic = gic::InterruptController::gic(mpcore);
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let mut gic = gic::InterruptController::gic(mpcore);
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@ -73,7 +73,7 @@ pub unsafe extern "C" fn IRQ() {
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stdio::drop_uart();
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stdio::drop_uart();
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println!("IRQ");
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println!("IRQ");
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loop {}
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loop {}
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}
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});
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pub fn restart_core1() {
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pub fn restart_core1() {
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let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::mpcore());
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let mut interrupt_controller = gic::InterruptController::gic(mpcore::RegisterBlock::mpcore());
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@ -6,17 +6,17 @@
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extern crate alloc;
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extern crate alloc;
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pub mod asm;
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pub mod asm;
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pub mod regs;
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pub mod cache;
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pub mod cache;
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mod fpu;
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pub mod l2c;
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pub mod mmu;
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pub mod mmu;
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pub mod mutex;
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pub mod mutex;
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pub mod sync_channel;
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pub mod regs;
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pub mod semaphore;
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pub mod semaphore;
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pub mod l2c;
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pub mod sync_channel;
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mod uncached;
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mod uncached;
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mod fpu;
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pub use uncached::UncachedSlice;
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pub use fpu::enable_fpu;
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pub use fpu::enable_fpu;
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pub use uncached::UncachedSlice;
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global_asm!(include_str!("exceptions.s"));
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global_asm!(include_str!("exceptions.s"));
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@ -35,3 +35,38 @@ pub fn notify_spin_lock() {
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}
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}
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}
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}
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#[macro_export]
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/// Interrupt handler, which setup the stack and jump to actual interrupt handler.
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/// - `name` is the name of the interrupt, should be the same as the one defined in vector table.
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/// - `name2` is the name for the actual handler, should be different from name.
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/// - `stack0` is the stack for the interrupt handler when called from core0.
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/// - `stack1` is the stack for the interrupt handler when called from core1.
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/// - `body` is the body of the actual interrupt handler, should be a normal unsafe rust function
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/// body.
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///
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/// Note that the interrupt handler would use the same stack as normal programs by default, so
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/// interrupt handlers should not return to normal program or it may corrupt the stack.
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macro_rules! interrupt_handler {
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($name:ident, $name2:ident, $stack0:ident, $stack1:ident, $body:block) => {
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#[link_section = ".text.boot"]
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#[no_mangle]
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#[naked]
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pub unsafe extern "C" fn $name() -> ! {
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asm!(
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// setup SP, depending on CPU 0 or 1
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"mrc p15, #0, r0, c0, c0, #5",
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concat!("movw r1, :lower16:", stringify!($stack0)),
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concat!("movt r1, :upper16:", stringify!($stack0)),
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"tst r0, #3",
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concat!("movwne r1, :lower16:", stringify!($stack1)),
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concat!("movtne r1, :upper16:", stringify!($stack1)),
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"mov sp, r1",
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concat!("bl ", stringify!($name2)),
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options(noreturn)
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);
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}
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#[no_mangle]
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pub unsafe extern "C" fn $name2() -> ! $body
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};
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}
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@ -1,63 +1,49 @@
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use libregister::RegisterR;
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use libregister::RegisterR;
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use libcortex_a9::regs::{DFSR, MPIDR};
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use libcortex_a9::{regs::{DFSR, MPIDR}, interrupt_handler};
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use libboard_zynq::{println, stdio};
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use libboard_zynq::{println, stdio};
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#[link_section = ".text.boot"]
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interrupt_handler!(UndefinedInstruction, undefined_instruction, __stack0_start, __stack1_start, {
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#[no_mangle]
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pub unsafe extern "C" fn UndefinedInstruction() {
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stdio::drop_uart();
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stdio::drop_uart();
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println!("UndefinedInstruction");
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println!("UndefinedInstruction");
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loop {}
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loop {}
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}
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});
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#[link_section = ".text.boot"]
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interrupt_handler!(SoftwareInterrupt, software_interrupt, __stack0_start, __stack1_start, {
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#[no_mangle]
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pub unsafe extern "C" fn SoftwareInterrupt() {
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stdio::drop_uart();
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stdio::drop_uart();
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println!("SoftwareInterrupt");
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println!("SoftwareInterrupt");
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loop {}
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loop {}
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}
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});
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#[link_section = ".text.boot"]
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interrupt_handler!(PrefetchAbort, prefetch_abort, __stack0_start, __stack1_start, {
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#[no_mangle]
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pub unsafe extern "C" fn PrefetchAbort() {
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stdio::drop_uart();
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stdio::drop_uart();
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println!("PrefetchAbort");
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println!("PrefetchAbort");
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loop {}
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loop {}
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}
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});
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#[link_section = ".text.boot"]
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interrupt_handler!(DataAbort, data_abort, __stack0_start, __stack1_start, {
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#[no_mangle]
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pub unsafe extern "C" fn DataAbort() {
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stdio::drop_uart();
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stdio::drop_uart();
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println!("DataAbort on core {}", MPIDR.read().cpu_id());
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println!("DataAbort on core {}", MPIDR.read().cpu_id());
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println!("DFSR: {:03X}", DFSR.read());
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println!("DFSR: {:03X}", DFSR.read());
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loop {}
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loop {}
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}
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});
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#[link_section = ".text.boot"]
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interrupt_handler!(ReservedException, reserved_exception, __stack0_start, __stack1_start, {
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#[no_mangle]
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pub unsafe extern "C" fn ReservedException() {
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stdio::drop_uart();
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stdio::drop_uart();
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println!("ReservedException");
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println!("ReservedException");
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loop {}
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loop {}
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}
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});
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#[link_section = ".text.boot"]
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#[no_mangle]
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#[cfg(feature = "dummy_irq_handler")]
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#[cfg(feature = "dummy_irq_handler")]
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pub unsafe extern "C" fn IRQ() {
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interrupt_handler!(IRQ, irq, __stack0_start, __stack1_start, {
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stdio::drop_uart();
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stdio::drop_uart();
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println!("IRQ");
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println!("IRQ");
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loop {}
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loop {}
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}
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});
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#[link_section = ".text.boot"]
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interrupt_handler!(FIQ, fiq, __stack0_start, __stack1_start, {
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#[no_mangle]
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pub unsafe extern "C" fn FIQ() {
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stdio::drop_uart();
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stdio::drop_uart();
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println!("FIQ");
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println!("FIQ");
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loop {}
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loop {}
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}
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});
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@ -4,7 +4,7 @@ use libregister::{
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VolatileCell,
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VolatileCell,
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RegisterR, RegisterW, RegisterRW,
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RegisterR, RegisterW, RegisterRW,
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};
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};
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use libcortex_a9::{asm, l2c, regs::*, cache, mmu, spin_lock_yield, notify_spin_lock, enable_fpu};
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use libcortex_a9::{asm, l2c, regs::*, cache, mmu, spin_lock_yield, notify_spin_lock, enable_fpu, interrupt_handler};
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use libboard_zynq::{slcr, mpcore};
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use libboard_zynq::{slcr, mpcore};
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extern "C" {
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extern "C" {
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static mut CORE1_ENABLED: VolatileCell<bool> = VolatileCell::new(false);
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static mut CORE1_ENABLED: VolatileCell<bool> = VolatileCell::new(false);
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#[link_section = ".text.boot"]
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interrupt_handler!(Reset, reset_irq, __stack0_start, __stack1_start, {
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#[no_mangle]
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pub unsafe extern "C" fn Reset() -> ! {
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match MPIDR.read().cpu_id() {
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match MPIDR.read().cpu_id() {
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0 => {
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0 => {
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SP.write(&mut __stack0_start as *mut _ as u32);
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SP.write(&mut __stack0_start as *mut _ as u32);
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}
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}
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_ => unreachable!(),
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_ => unreachable!(),
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}
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}
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}
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});
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#[inline(never)]
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#[inline(never)]
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unsafe extern "C" fn boot_core0() -> ! {
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unsafe extern "C" fn boot_core0() -> ! {
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#![feature(alloc_error_handler)]
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#![feature(alloc_error_handler)]
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#![feature(panic_info_message)]
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#![feature(panic_info_message)]
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#![feature(naked_functions)]
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#![feature(asm)]
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pub extern crate alloc;
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pub extern crate alloc;
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pub extern crate compiler_builtins;
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pub extern crate compiler_builtins;
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#[cfg(feature = "panic_handler")]
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#[cfg(feature = "panic_handler")]
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mod panic;
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mod panic;
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pub mod ram;
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pub mod ram;
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