forked from M-Labs/zynq-rs
mmu: add early memory barrier to L1Table.update()
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@ -368,6 +368,7 @@ impl L1Table {
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let result = f(&mut section);
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entry.set_section(section);
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asm::dmb();
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cache::tlbiall();
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asm::dsb();
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asm::isb();
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