libboard_zynq: enable i2c+eeprom for target_kasli_soc

libboard_zynq/src/i2c/eeprom.rs

@@ -22,6 +22,17 @@ impl<'a> EEPROM<'a> {
         }
     }
 
+    #[cfg(feature = "target_kasli_soc")]
+    pub fn new(i2c: &'a mut I2c, page_size: u8) -> Self {
+        EEPROM {
+            i2c: i2c,
+            port: 3,
+            address: 0x57,
+            page_size: page_size,
+            count_down: unsafe { crate::timer::GlobalTimer::get() }.countdown()
+        }
+    }
+
     #[cfg(feature = "target_zc706")]
     fn select(&mut self) -> Result<(), &'static str> {
         let mask: u16 = 1 << self.port;
@@ -29,6 +40,14 @@ impl<'a> EEPROM<'a> {
         Ok(())
     }
 
+    #[cfg(feature = "target_kasli_soc")]
+    fn select(&mut self) -> Result<(), &'static str> {
+        let mask: u16 = 1 << self.port;
+        // tca9548 is compatible with pca9548
+        self.i2c.pca9548_select(0b1110001, mask as u8)?;
+        Ok(())
+    }
+
     /// Random read
     pub fn read<'r>(&mut self, addr: u8, buf: &'r mut [u8]) -> Result<(), &'static str> {
         self.select()?;

libboard_zynq/src/i2c/mod.rs

@@ -13,7 +13,7 @@ pub struct I2c {
 }
 
 impl I2c {
-    #[cfg(feature = "target_zc706")]
+    #[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
     pub fn i2c0() -> Self {
         // Route I2C 0 SCL / SDA Signals to MIO Pins 50 / 51
         slcr::RegisterBlock::unlocked(|slcr| {

libboard_zynq/src/i2c/regs.rs

@@ -20,6 +20,7 @@ use libregister::{
 //
 // Current compatibility:
 // zc706: GPIO 50, 51 == SCL, SDA
+// kasli_soc: GPIO 50, 51 == SCL, SDA
 
 pub struct RegisterBlock {
     pub gpio_output_mask: &'static mut GPIOOutputMask,
@@ -42,50 +43,50 @@ impl RegisterBlock {
 // MASK_DATA_1_MSW:
 // Maskable output data for MIO[53:48]
 register!(gpio_output_mask, GPIOOutputMask, RW, u32);
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_at!(GPIOOutputMask, 0xE000A00C, new);
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 // Output for SCL
-#[cfg(feature = "target_zc706")]
 register_bit!(gpio_output_mask, scl_o, 2);
 // Output for SDA
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_bit!(gpio_output_mask, sda_o, 3);
 // Mask for keeping bits except SCL and SDA unchanged
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_bits!(gpio_output_mask, mask, u16, 16, 31);
 
 // DATA_1_RO:
 // Input data for MIO[53:32]
 register!(gpio_input, GPIOInput, RO, u32);
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_at!(GPIOInput, 0xE000A064, new);
 // Input for SCL
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_bit!(gpio_input, scl, 18);
 // Input for SDA
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_bit!(gpio_input, sda, 19);
 
 // DIRM_1:
 // Direction mode for MIO[53:32]; 0/1 = in/out
 register!(gpio_direction, GPIODirection, RW, u32);
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_at!(GPIODirection, 0xE000A244, new);
 // Direction for SCL
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_bit!(gpio_direction, scl, 18);
 // Direction for SDA
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_bit!(gpio_direction, sda, 19);
 
 // OEN_1:
 // Output enable for MIO[53:32]
 register!(gpio_output_enable, GPIOOutputEnable, RW, u32);
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_at!(GPIOOutputEnable, 0xE000A248, new);
 // Output enable for SCL
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_bit!(gpio_output_enable, scl, 18);
 // Output enable for SDA
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 register_bit!(gpio_output_enable, sda, 19);

libboard_zynq/src/lib.rs

@@ -19,7 +19,7 @@ pub mod gic;
 pub mod time;
 pub mod timer;
 pub mod sdio;
-#[cfg(feature = "target_zc706")]
+#[cfg(any(feature = "target_zc706", feature = "target_kasli_soc"))]
 pub mod i2c;
 pub mod logger;
 pub mod ps7_init;