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openocd: add Kasli-SoC (with digilent external JTAG)

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This commit is contained in:
Sebastien Bourdeauducq 2021-05-28 18:22:17 +08:00
parent def17829d9
commit 666c077cef
1 changed files with 40 additions and 0 deletions
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openocd/kasli-soc.cfg Normal file
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# Using external JTAG for now.
source ./digilent-hs2.cfg
adapter_khz 1000
set PL_TAPID 0x1372c093
set SMP 1
source ./zynq-7000.cfg
reset_config none
set XC7_JSHUTDOWN 0x0d
set XC7_JPROGRAM 0x0b
set XC7_JSTART 0x0c
set XC7_BYPASS 0x3f
proc xc7_program {tap} {
global XC7_JSHUTDOWN XC7_JPROGRAM XC7_JSTART XC7_BYPASS
irscan $tap $XC7_JSHUTDOWN
irscan $tap $XC7_JPROGRAM
runtest 60000
#JSTART prevents this from working...
#irscan $tap $XC7_JSTART
runtest 2000
irscan $tap $XC7_BYPASS
runtest 2000
}
pld device virtex2 zynq.tap 1
init
xc7_program zynq.tap
halt
# Disable MMU
targets $_TARGETNAME_1
arm mcr 15 0 1 0 0 [expr [arm mrc 15 0 1 0 0] & ~0xd]
targets $_TARGETNAME_0
arm mcr 15 0 1 0 0 [expr [arm mrc 15 0 1 0 0] & ~0xd]