forked from M-Labs/zynq-rs
50 lines
1005 B
INI
50 lines
1005 B
INI
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source [find interface/ftdi/digilent-hs1.cfg]
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source [find target/zynq_7000.cfg]
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set _TARGETNAME_0 "zynq.cpu0"
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set _TARGETNAME_1 "zynq.cpu1"
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set _SMP 1
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proc zynq_restart { wait } {
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global _SMP
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global _TARGETNAME_0
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global _TARGETNAME_1
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set target0 $_TARGETNAME_0
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set target1 $_TARGETNAME_1
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echo "Zynq reset, resetting the board ... "
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poll off
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#
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# Issue the reset via the SLCR
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#
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catch {
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mww phys 0xF8000008 0xDF0D
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mww phys 0xF8000200 1
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}
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echo "Zynq reset waiting for $wait msecs ... "
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sleep $wait
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#
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# Reconnect the DAP etc due to the reset.
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#
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$target0 cortex_a dbginit
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$target0 arm core_state arm
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if { $_SMP } {
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$target1 arm core_state arm
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$target1 cortex_a dbginit
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cortex_a smp_off
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}
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poll on
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#
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# We can now halt the core.
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#
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if { $_SMP } {
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targets $target1
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halt
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}
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targets $target0
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halt
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#zynq_rtems_setup
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}
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init
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zynq_restart 100
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