forked from M-Labs/humpback-dds
fix: reduce warning
This commit is contained in:
parent
f94528ae2a
commit
82867178f9
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@ -7,7 +7,6 @@ use core::sync::atomic::{AtomicU32, Ordering};
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extern crate log;
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extern crate log;
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use cortex_m;
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use cortex_m;
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use cortex_m::asm::nop;
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use cortex_m_rt::{
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use cortex_m_rt::{
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entry,
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entry,
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exception,
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exception,
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@ -15,14 +14,9 @@ use cortex_m_rt::{
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extern crate smoltcp;
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extern crate smoltcp;
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use stm32h7xx_hal::ethernet;
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use stm32h7xx_hal::ethernet;
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use stm32h7xx_hal::gpio::Speed;
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use stm32h7xx_hal::hal::digital::v2::InputPin;
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use stm32h7xx_hal::hal::digital::v2::{
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OutputPin,
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InputPin,
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};
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use stm32h7xx_hal::rcc::CoreClocks;
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use stm32h7xx_hal::rcc::CoreClocks;
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use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
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use stm32h7xx_hal::{pac, prelude::*, spi, stm32, stm32::interrupt};
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use Speed::*;
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use core::{
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use core::{
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str,
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str,
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@ -32,8 +26,8 @@ use core::mem::uninitialized;
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// Exception: no phy::wait
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// Exception: no phy::wait
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//use smoltcp::phy::wait as phy_wait;
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//use smoltcp::phy::wait as phy_wait;
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use smoltcp::wire::{EthernetAddress, IpAddress, IpCidr, Ipv4Address};
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use smoltcp::wire::{IpAddress, IpCidr};
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use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder, Routes};
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use smoltcp::iface::{NeighborCache, EthernetInterfaceBuilder};
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use smoltcp::socket::SocketSet;
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use smoltcp::socket::SocketSet;
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use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
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use smoltcp::socket::{SocketHandle, TcpSocket, TcpSocketBuffer};
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use smoltcp::time::{Duration, Instant};
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use smoltcp::time::{Duration, Instant};
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@ -44,16 +38,6 @@ use embedded_nal::TcpStack;
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use firmware;
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use firmware;
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use firmware::{
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use firmware::{
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attenuator::Attenuator,
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config_register::{
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ConfigRegister,
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CFGMask,
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StatusMask,
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},
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dds::{
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DDS,
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DDSCFRMask,
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},
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cpld::{
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cpld::{
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CPLD,
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CPLD,
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},
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},
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@ -63,6 +47,10 @@ use firmware::{
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Channel1SwitchCommand,
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Channel1SwitchCommand,
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Channel2SwitchCommand,
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Channel2SwitchCommand,
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Channel3SwitchCommand,
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Channel3SwitchCommand,
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Channel0AttenuationCommand,
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Channel1AttenuationCommand,
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Channel2AttenuationCommand,
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Channel3AttenuationCommand,
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ClockSourceCommand,
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ClockSourceCommand,
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ClockDivisionCommand,
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ClockDivisionCommand,
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},
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},
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@ -83,9 +71,6 @@ use scpi::{
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ieee488_stb,
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ieee488_stb,
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ieee488_tst,
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ieee488_tst,
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ieee488_wai,
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ieee488_wai,
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nquery,
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//Helpers
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qonly,
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scpi_crate_version,
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scpi_crate_version,
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scpi_status,
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scpi_status,
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scpi_system,
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scpi_system,
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@ -290,16 +275,20 @@ fn main() -> ! {
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}
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}
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},
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},
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"CHANNEL0" => {
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"CHANNEL0" => {
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"SWitch" => Channel0SwitchCommand
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"SWitch" => Channel0SwitchCommand,
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"Attenuation" => Channel0AttenuationCommand
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},
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},
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"CHANNEL1" => {
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"CHANNEL1" => {
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"SWitch" => Channel1SwitchCommand
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"SWitch" => Channel1SwitchCommand,
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"Attenuation" => Channel1AttenuationCommand
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},
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},
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"CHANNEL2" => {
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"CHANNEL2" => {
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"SWitch" => Channel2SwitchCommand
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"SWitch" => Channel2SwitchCommand,
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"Attenuation" => Channel2AttenuationCommand
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},
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},
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"CHANNEL3" => {
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"CHANNEL3" => {
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"SWitch" => Channel3SwitchCommand
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"SWitch" => Channel3SwitchCommand,
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"Attenuation" => Channel3AttenuationCommand
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},
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},
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"CLOCK" => {
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"CLOCK" => {
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"SOURCE" => ClockSourceCommand,
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"SOURCE" => ClockSourceCommand,
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@ -364,7 +353,7 @@ fn main() -> ! {
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}
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}
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if socket.can_recv() {
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if socket.can_recv() {
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let mut data = socket.recv(|buffer| {
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let data = socket.recv(|buffer| {
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(buffer.len(), buffer)
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(buffer.len(), buffer)
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}).unwrap();
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}).unwrap();
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if str::from_utf8(data).unwrap().trim() == "quit" {
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if str::from_utf8(data).unwrap().trim() == "quit" {
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@ -394,6 +383,7 @@ use stm32h7xx_hal::gpio::{
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/*
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/*
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* Migrated ethernet setup pins
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* Migrated ethernet setup pins
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*/
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*/
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#[allow(non_camel_case_types)]
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pub fn setup_ethernet_pins<REF_CLK, MDIO, MDC, CRS_DV, RXD0, RXD1, TX_EN, TXD0, TXD1>(
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pub fn setup_ethernet_pins<REF_CLK, MDIO, MDC, CRS_DV, RXD0, RXD1, TX_EN, TXD0, TXD1>(
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pa1: PA1<REF_CLK>, pa2: PA2<MDIO>, pc1: PC1<MDC>, pa7: PA7<CRS_DV>, pc4: PC4<RXD0>,
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pa1: PA1<REF_CLK>, pa2: PA2<MDIO>, pc1: PC1<MDC>, pa7: PA7<CRS_DV>, pc4: PC4<RXD0>,
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pc5: PC5<RXD1>, pg11: PG11<TX_EN>, pg13: PG13<TXD0>, pb13: PB13<TXD1>
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pc5: PC5<RXD1>, pg11: PG11<TX_EN>, pg13: PG13<TXD0>, pb13: PB13<TXD1>
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@ -40,20 +40,16 @@ where
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}
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}
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let mut clone = self.data.clone();
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let mut clone = self.data.clone();
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// Transmit SPI once to set attenuation
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// Transmit SPI once to set attenuation
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match self.spi.transfer(&mut clone).map_err(Error::SPI) {
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self.spi.transfer(&mut clone)
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Err(e) => Err(Error::AttenuatorError),
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.map(|_| ())
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Ok(_) => Ok(()),
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.map_err(|_| Error::AttenuatorError)
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}
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}
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}
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pub fn set_channel_attenuation(&mut self, channel: u8, attenuation: f32) -> Result<(), Error<E>> {
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pub fn set_channel_attenuation(&mut self, channel: u8, attenuation: f32) -> Result<(), Error<E>> {
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assert!(channel < 4);
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assert!(channel < 4);
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let mut arr: [f32; 4] = self.get_attenuation()?;
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let mut arr: [f32; 4] = self.get_attenuation()?;
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arr[channel as usize] = attenuation;
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arr[channel as usize] = attenuation;
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match self.set_attenuation(arr) {
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self.set_attenuation(arr).map(|_| ())
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Ok(v) => Ok(()),
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Err(e) => Err(e)
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}
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}
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}
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pub fn get_channel_attenuation(&mut self, channel: u8) -> Result<f32, Error<E>> {
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pub fn get_channel_attenuation(&mut self, channel: u8) -> Result<f32, Error<E>> {
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@ -9,6 +9,7 @@
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macro_rules! construct_bitmask {
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macro_rules! construct_bitmask {
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($collection: ident; $unsigned_type: ty; $($name: ident, $shift: expr, $width: expr),+) => {
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($collection: ident; $unsigned_type: ty; $($name: ident, $shift: expr, $width: expr),+) => {
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[derive(Debug, Copy, Clone, PartialEq, Eq)]
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#[allow(non_camel_case_types)]
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pub enum $collection {
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pub enum $collection {
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$(
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$(
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$name,
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$name,
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@ -213,6 +213,7 @@ where
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}
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}
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}
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}
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#[allow(non_snake_case)]
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fn get_VCO_no(&mut self, f_sys_clk: u64, divider: u8) -> Result<u8, Error<E>> {
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fn get_VCO_no(&mut self, f_sys_clk: u64, divider: u8) -> Result<u8, Error<E>> {
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// Select a VCO
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// Select a VCO
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if divider == 1 {
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if divider == 1 {
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@ -387,10 +388,9 @@ macro_rules! impl_register_io {
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for i in 0..$reg_byte_size {
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for i in 0..$reg_byte_size {
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arr[i+1] = bytes[i];
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arr[i+1] = bytes[i];
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}
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}
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match self.spi.transfer(&mut arr).map_err(Error::SPI) {
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self.spi.transfer(&mut arr)
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Ok(v) => Ok(()),
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.map(|_| ())
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Err(e) => Err(e),
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.map_err(Error::SPI)
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}
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},
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},
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)*
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)*
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_ => panic!("Bad address for DDS writing.")
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_ => panic!("Bad address for DDS writing.")
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33
src/lib.rs
33
src/lib.rs
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@ -153,6 +153,7 @@ pub trait UrukulTraits {
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fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>;
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fn set_channel_switch(&mut self, channel: u32, status: bool) -> Result<(), Self::Error>;
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fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error>;
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fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error>;
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fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error>;
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fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error>;
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fn set_channel_attenuation(&mut self, channel: u8, attenuation: f32) -> Result<(), Self::Error>;
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}
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}
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impl<SPI, E> UrukulTraits for Urukul<SPI>
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impl<SPI, E> UrukulTraits for Urukul<SPI>
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@ -163,10 +164,7 @@ where
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fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error> {
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fn get_channel_switch_status(&mut self, channel: u32) -> Result<bool, Self::Error> {
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if channel < 4 {
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if channel < 4 {
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match self.config_register.get_status(StatusMask::RF_SW) {
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self.config_register.get_status(StatusMask::RF_SW).map(|val| (val & (1 << channel)) != 0)
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Ok(val) => Ok((val & (1 << channel)) != 0),
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Err(_e) => Err(_e),
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}
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} else {
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} else {
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Err(Error::ParameterError)
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Err(Error::ParameterError)
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}
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}
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@ -182,19 +180,16 @@ where
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prev & (!(1 << channel))
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prev & (!(1 << channel))
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}
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}
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};
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};
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match self.config_register.set_configurations(&mut [
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self.config_register.set_configurations(&mut [
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(CFGMask::RF_SW, next),
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(CFGMask::RF_SW, next),
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]) {
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]).map(|_| ())
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Ok(_) => Ok(()),
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Err(_e) => Err(_e),
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}
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} else {
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} else {
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Err(Error::ParameterError)
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Err(Error::ParameterError)
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}
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}
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}
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}
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fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error> {
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fn set_clock_source(&mut self, source: ClockSource) -> Result<(), Self::Error> {
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let result = match source {
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match source {
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ClockSource::OSC => self.config_register.set_configurations(&mut [
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ClockSource::OSC => self.config_register.set_configurations(&mut [
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(CFGMask::CLK_SEL0, 0),
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(CFGMask::CLK_SEL0, 0),
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(CFGMask::CLK_SEL1, 0),
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(CFGMask::CLK_SEL1, 0),
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@ -206,15 +201,11 @@ where
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ClockSource::SMA => self.config_register.set_configurations(&mut [
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ClockSource::SMA => self.config_register.set_configurations(&mut [
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(CFGMask::CLK_SEL0, 1),
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(CFGMask::CLK_SEL0, 1),
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]),
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]),
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};
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}.map(|_| ())
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match result {
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Ok(_) => Ok(()),
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Err(_e) => Err(_e),
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}
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}
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}
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fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error> {
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fn set_clock_division(&mut self, division: u8) -> Result<(), Self::Error> {
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let result = match division {
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match division {
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1 => self.config_register.set_configurations(&mut [
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1 => self.config_register.set_configurations(&mut [
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(CFGMask::DIV, 1),
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(CFGMask::DIV, 1),
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]),
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]),
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@ -225,10 +216,10 @@ where
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(CFGMask::DIV, 3),
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(CFGMask::DIV, 3),
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]),
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]),
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_ => Err(Error::ParameterError),
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_ => Err(Error::ParameterError),
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};
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}.map(|_| ())
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match result {
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}
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Ok(_) => Ok(()),
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Err(_e) => Err(_e),
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fn set_channel_attenuation(&mut self, channel: u8, attenuation: f32) -> Result<(), Self::Error> {
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}
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self.attenuator.set_channel_attenuation(channel, attenuation)
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}
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}
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}
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}
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30
src/main.rs
30
src/main.rs
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@ -1,7 +1,10 @@
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#![no_main]
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#![no_main]
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#![no_std]
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#![no_std]
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use panic_semihosting as _;
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#[macro_use]
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extern crate log;
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use log::{trace, debug, info, warn};
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use stm32h7xx_hal::hal::digital::v2::{
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use stm32h7xx_hal::hal::digital::v2::{
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InputPin,
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InputPin,
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@ -11,7 +14,6 @@ use stm32h7xx_hal::{pac, prelude::*, spi};
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use cortex_m;
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use cortex_m;
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use cortex_m_rt::entry;
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use cortex_m_rt::entry;
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use cortex_m_semihosting::hprintln;
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use firmware;
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use firmware;
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use firmware::{
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use firmware::{
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@ -30,10 +32,13 @@ use firmware::{
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}
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}
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};
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};
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#[path = "../examples/util/logger.rs"]
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mod logger;
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#[entry]
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#[entry]
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fn main() -> ! {
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fn main() -> ! {
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let cp = cortex_m::Peripherals::take().unwrap();
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let mut cp = cortex_m::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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let dp = pac::Peripherals::take().unwrap();
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let pwr = dp.PWR.constrain();
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let pwr = dp.PWR.constrain();
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@ -41,10 +46,17 @@ fn main() -> ! {
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let rcc = dp.RCC.constrain();
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let rcc = dp.RCC.constrain();
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let ccdr = rcc
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let ccdr = rcc
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.use_hse(8.mhz())
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.sys_ck(400.mhz())
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.sys_ck(400.mhz())
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.pll1_q_ck(48.mhz())
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.pll1_q_ck(48.mhz())
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.pll1_r_ck(400.mhz())
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.freeze(vos, &dp.SYSCFG);
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.freeze(vos, &dp.SYSCFG);
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unsafe {
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logger::enable_itm(&dp.DBGMCU, &mut cp.DCB, &mut cp.ITM);
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}
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logger::init();
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let mut delay = cp.SYST.delay(ccdr.clocks);
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let mut delay = cp.SYST.delay(ccdr.clocks);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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let gpioa = dp.GPIOA.split(ccdr.peripheral.GPIOA);
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@ -58,10 +70,10 @@ fn main() -> ! {
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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let fpga_cdone = gpiod.pd15.into_pull_up_input();
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match fpga_cdone.is_high() {
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match fpga_cdone.is_high() {
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Ok(true) => hprintln!("FPGA is ready."),
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Ok(true) => info!("FPGA is ready."),
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Ok(_) => hprintln!("FPGA is in reset state."),
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Ok(_) => info!("FPGA is in reset state."),
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Err(_) => hprintln!("Error: Cannot read C_DONE"),
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Err(_) => info!("Error: Cannot read C_DONE"),
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}.unwrap();
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};
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/*
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/*
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* Using SPI1, AF5
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* Using SPI1, AF5
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@ -150,10 +162,10 @@ fn main() -> ! {
|
||||||
0x04, // Recirculate mode
|
0x04, // Recirculate mode
|
||||||
]).unwrap();
|
]).unwrap();
|
||||||
|
|
||||||
hprintln!("{:#X?}", dds0.read_register(0x0E, &mut[
|
debug!("{:#X?}", dds0.read_register(0x0E, &mut[
|
||||||
0x00, 0x00, 0x00, 0x00,
|
0x00, 0x00, 0x00, 0x00,
|
||||||
0x00, 0x00, 0x00, 0x00,
|
0x00, 0x00, 0x00, 0x00,
|
||||||
]).unwrap()).unwrap();
|
]).unwrap());
|
||||||
|
|
||||||
// Choose profile 0
|
// Choose profile 0
|
||||||
config.set_configurations(&mut [
|
config.set_configurations(&mut [
|
||||||
|
|
|
@ -60,15 +60,10 @@ impl<'a, 'b, 'c, 'n> NetworkStack<'a, 'b, 'c, 'n> {
|
||||||
}
|
}
|
||||||
|
|
||||||
pub fn update(&mut self, time: u32) -> bool {
|
pub fn update(&mut self, time: u32) -> bool {
|
||||||
match self.network_interface.poll(
|
self.network_interface.poll(
|
||||||
&mut self.sockets.borrow_mut(),
|
&mut self.sockets.borrow_mut(),
|
||||||
net::time::Instant::from_millis(time as i64),
|
net::time::Instant::from_millis(time as i64),
|
||||||
) {
|
).map_or(true, |changed| changed == false)
|
||||||
Ok(changed) => changed == false,
|
|
||||||
Err(e) => {
|
|
||||||
true
|
|
||||||
}
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
fn get_ephemeral_port(&self) -> u16 {
|
fn get_ephemeral_port(&self) -> u16 {
|
||||||
|
|
|
@ -51,13 +51,13 @@ where
|
||||||
|
|
||||||
fn transfer<'w>(&mut self, words: &'w mut[u8]) -> Result<&'w [u8], Self::Error> {
|
fn transfer<'w>(&mut self, words: &'w mut[u8]) -> Result<&'w [u8], Self::Error> {
|
||||||
self.0.do_on_get_ref_mut_data(move |mut dev| {
|
self.0.do_on_get_ref_mut_data(move |mut dev| {
|
||||||
dev.select_chip(self.1);
|
dev.select_chip(self.1).map_err(|_| Error::CSError)?;
|
||||||
let result = dev.spi.transfer(words).map_err(Error::SPI);
|
let result = dev.spi.transfer(words).map_err(Error::SPI)?;
|
||||||
dev.select_chip(0);
|
dev.select_chip(0).map_err(|_| Error::CSError)?;
|
||||||
if self.2 {
|
if self.2 {
|
||||||
dev.issue_io_update();
|
dev.issue_io_update().map_err(|_| Error::IOUpdateError)?;
|
||||||
}
|
}
|
||||||
result
|
Ok(result)
|
||||||
})
|
})
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
Loading…
Reference in New Issue