attenuator: init

Cargo.toml

@@ -10,11 +10,10 @@ cortex-m-semihosting = "0.3.3"
 panic-halt = "0.2.0"
 cortex-m = "0.6.2"
 cortex-m-rt = "0.6.12"
+embedded-hal = "0.2.4"
 stm32h7xx-hal = {version = "0.6.0", features = [ "stm32h743v", "rt", "unproven" ] }
 stm32h7-ethernet = { version = "0.2.0", features = [ "phy_lan8742a", "stm32h743v" ] }
 smoltcp = { version = "0.6.0", default-features = false, features = [ "ethernet", "proto-ipv4", "proto-ipv6", "socket-raw" ] }
-xca9548a = "0.2.0"
-lm75 = "0.1.1"
 nb = "1.0.0"
 
 # Logging and Panicking

migen/fpga_config.py

@@ -29,7 +29,7 @@ class UrukulConnector(Module):
 		]
 
 		# Debug purposes: Tie EEM MISO to EEM MOSI
-		# self.comb += eem.p[2].eq(eem.n[1])
+		self.comb += eem.p[2].eq(eem.n[1])
 
 
 if __name__ == "__main__":

src/attenuator.rs

@@ -0,0 +1,57 @@
+use embedded_hal::blocking::spi::Transfer;
+use cortex_m::asm::nop;
+use cortex_m_semihosting::hprintln;
+//use core::clone;
+
+use crate::Error;
+
+pub struct Attenuator<SPI> {
+	spi: SPI,
+	data: [u8; 4],
+}
+
+impl<SPI, E> Attenuator<SPI>
+where
+	SPI: Transfer<u8, Error = E>
+{
+	pub fn new(spi: SPI) -> Self {
+		Attenuator {
+			spi,
+			data: [0, 0, 0, 0],
+		}
+	}
+
+	pub fn set_attenuation(&mut self, att: [f32; 4]) -> Result<[u8; 4], Error<E>> {
+		for i in 0..4 {
+			let mut atten = att[i];
+			if att[i] > 31.5 {
+				atten = 31.5;
+			}
+			if att[i] < 0.0 {
+				atten = 0.0;
+			}
+			self.data[i] = (atten * 2.0) as u8;
+			self.data[i] = self.data[i] << 2;
+		}
+		let mut clone = self.data.clone();
+		hprintln!("Before Attenuation: {:?}", clone).unwrap();
+		match self.spi.transfer(&mut clone).map_err(Error::SPI) {
+			Ok(arr) => {
+				hprintln!("Attenuation array: {:?}", arr).unwrap()
+			},
+			err => nop()
+		};
+		Ok(clone.clone())
+	}
+}
+
+impl<SPI, E> Transfer<u8> for Attenuator<SPI>
+where
+	SPI: Transfer<u8, Error = E>
+{
+	type Error = Error<E>;
+
+	fn transfer<'w>(&mut self, words: &'w mut [u8]) -> Result<&'w [u8], Self::Error> {
+		self.spi.transfer(words).map_err(Error::SPI)
+	}
+}

src/generic_spi_device.rs

@@ -0,0 +1,27 @@
+use embedded_hal::blocking::spi::Transfer;
+use cortex_m::asm::nop;
+use cortex_m_semihosting::hprintln;
+use crate::Error;
+
+pub struct SPIStub<SPI> {
+	spi: SPI
+}
+
+impl<SPI, E> SPIStub<SPI>
+where
+	SPI: Transfer<u8, Error = E>
+{
+	pub fn new(spi: SPI) -> Self {
+		SPIStub{
+			spi
+		}
+	}
+
+	pub fn do_something(&mut self) {
+		let mut buffer :[u8; 4]= [0xDE, 0xAD, 0xBE, 0xEF];
+		match self.spi.transfer(&mut buffer).map_err(Error::SPI) {
+			Ok(arr) => hprintln!("{:?}", arr).unwrap(),
+			Err(_) => nop(),
+		}
+	}
+}

src/lib.rs

@@ -1,17 +1,8 @@
 #![no_std]
-
+extern crate embedded_hal;
-use stm32h7xx_hal::{
+use embedded_hal::{
-	hal::{
+	digital::v2::OutputPin,
-		digital::v2::{
+	blocking::spi::Transfer,
-			InputPin,
-			OutputPin,
-		},
-		blocking::spi::Transfer,
-		spi::FullDuplex,
-	},
-	pac,
-	prelude::*,
-	spi,
 };
 
 use core::cell;
@@ -20,11 +11,12 @@ use cortex_m;
 use cortex_m::asm::nop;
 use cortex_m_semihosting::hprintln;
 
-use nb::block;
-
 pub mod spi_slave;
-use crate::spi_slave::{SPISlave, Parts};
+use crate::spi_slave::Parts;
 
+pub mod generic_spi_device;
+
+pub mod attenuator;
 
 /*
  *	Enum for structuring error
@@ -64,6 +56,7 @@ where
 {
 	type Error = Error<E>;
 	fn select_chip(&mut self, chip: u8) -> Result<(), Self::Error> {
+		hprintln!("Select chip: {}", chip).unwrap();
 		match chip & (1 << 0) {
 			0 => self.chip_select.0.set_low(),
 			_ => self.chip_select.0.set_high(),

src/main.rs

@@ -17,7 +17,12 @@ use cortex_m_semihosting::hprintln;
 use core::ptr;
 use nb::block;
 
-use firmware::CPLD;
+use firmware;
+use firmware::{
+	CPLD,
+	generic_spi_device::SPIStub,
+	attenuator::Attenuator,
+};
 
 #[entry]
 fn main() -> ! {
@@ -63,6 +68,12 @@ fn main() -> ! {
 	let mosi = gpiob.pb5.into_alternate_af5();
 	let miso = gpioa.pa6.into_alternate_af5();
 
+	let (cs0, cs1, cs2) = (
+		gpiob.pb12.into_push_pull_output(),
+		gpioa.pa15.into_push_pull_output(),
+		gpioc.pc7.into_push_pull_output(),
+	);
+
 	let mut spi = dp.SPI1.spi(
 		(sclk, miso, mosi),
 		spi::MODE_0,
@@ -71,19 +82,18 @@ fn main() -> ! {
 		&ccdr.clocks,
 	);
 
-	let mut data :u8 = 0xAD;
+	let mut switch = CPLD::new(spi, (cs0, cs1, cs2));
 
-	let mut switch = CPLD::new(spi, (
+	let parts = switch.split();
-		gpiob.pb12.into_push_pull_output(),
+	
-		gpioa.pa15.into_push_pull_output(),
+	let mut spi_stub = SPIStub::new(parts.spi1);
-		gpioc.pc7.into_push_pull_output(),
+	spi_stub.do_something();
-	));
+
+	let mut attenuator = Attenuator::new(parts.spi2);
+	let mut attenuation :[f32; 4] = [24.0, -5.0, 32.0, 10.2];
+	attenuator.set_attenuation(attenuation);
 
 	loop {
-//		hprintln!("Sent {}", data).unwrap();
-//		block!(spi.send(data)).unwrap();
-//		data = block!(spi.read()).unwrap();
-//		hprintln!("Read {}", data).unwrap();
 		nop();
 	}
 }

src/spi_slave.rs

@@ -1,16 +1,7 @@
-use stm32h7xx_hal::{
+use embedded_hal::{
-	hal::{
+	blocking::spi::Transfer,
-		digital::v2::{
+	digital::v2::OutputPin,
-			InputPin,
-			OutputPin,
-		},
-		blocking::spi::Transfer,
-	},
-	pac,
-	prelude::*,
-	spi,
 };
-
 use core::marker::PhantomData;
 
 use crate::{DoOnGetRefMutData, Error, SelectChip};