4410-4412: fix performance data condition

The condition should now align with wiki and sinara issue 354 / urukul issue 3.
This commit is contained in:
occheung 2021-12-06 13:03:59 +08:00
parent 41c6e37c74
commit e109ec2b6f

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@ -357,7 +357,13 @@ RF switches (1ns temporal resolution) on each channel provides 70 dB isolation.
\newpage
All performance data are produced using 1 GHz PLL unless otherwise noted.
All performance data are produced using the following setup unless otherwise noted.
\begin{itemize}
\item 100 MHz input clock into SMA, 10 dBm.
\item Input clock divided by 4.
\item PLL with x40 multiplier.
\item Output frequency at 80 MHz or 81 MHz.
\end{itemize}
\begin{table}[h]
\begin{threeparttable}