forked from sinara-hw/datasheets
4410-4412/RAM: lower background frequency to 5MHz
It is to make the plot easier for our eyes.
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@ -508,6 +508,7 @@ def configure_ram_mode(self, dds):
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dds.write_ram(self.asf_ram)
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self.core.break_realtime()
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dds.set(frequency=5*MHz, ram_destination=RAM_DEST_ASF)
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# Pass osk_enable=1 to set_cfr1() if it is not an amplitude RAM
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dds.set_cfr1(ram_enable=1, ram_destination=RAM_DEST_ASF)
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@ -525,9 +526,9 @@ def run(self):
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The generated RF output of the above example consists of the following features in sequence:
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\begin{enumerate}
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\item A 10 MHz RF pulse for 2 microseconds.
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\item A 5 MHz RF pulse for 2 microseconds.
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\item No signal for 1 microseconds.
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\item A 10 MHz RF pulse for 1 microseconds.
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\item A 5 MHz RF pulse for 1 microseconds.
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\item No signal for 3 microseconds.
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\item Go back to item 1.
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\end{enumerate}
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@ -543,7 +544,7 @@ Multiple RAM channels can also be synchronized.
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Similar to the 10 MHz single-tone RF signals, specify \texttt{phase} when calling \texttt{dds.set()} in \texttt{configure\char`_ram\char`_mode}.
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For example, set phase to 0 for the channels (\texttt{phase=0.0}).
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\begin{minted}{python}
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dds.set(frequency=10*MHz, phase=0.0, ram_destination=RAM_DEST_ASF)
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dds.set(frequency=5*MHz, phase=0.0, ram_destination=RAM_DEST_ASF)
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\end{minted}
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Then, replace the \texttt{run()} function with the following.
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\begin{minted}{python}
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