forked from M-Labs/artiq-zynq
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805beeacaf
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805beeacaf | |||
e1f493f3ca | |||
1f5ea41934 | |||
7f83d56ef5 | |||
1d431456f4 | |||
b03e380c1e | |||
47fc53c4bf | |||
42eaecf9e1 | |||
beb7e6f994 | |||
4502a47aa6 |
8
flake.lock
generated
8
flake.lock
generated
@ -11,11 +11,11 @@
|
||||
"src-pythonparser": "src-pythonparser"
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||||
},
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||||
"locked": {
|
||||
"lastModified": 1731734344,
|
||||
"narHash": "sha256-2vLRo9D5wDs5FArpc2pOfuKFrhnqIKjtZos88VJahhc=",
|
||||
"lastModified": 1732066716,
|
||||
"narHash": "sha256-krjvt9+RccnAxSEZcFhRpjA2S3CoqE4MSa1JUg421b4=",
|
||||
"ref": "refs/heads/master",
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||||
"rev": "27d54cb8f3a394b4f4adcbb3c2c9160c5bf3df47",
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"revCount": 9049,
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||||
"rev": "270a417a28b516d36983779a1adb6d33a3c55a4a",
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||||
"revCount": 9102,
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||||
"type": "git",
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||||
"url": "https://github.com/m-labs/artiq.git"
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},
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||||
|
@ -8,7 +8,9 @@ from migen.build.generic_platform import *
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from migen.genlib.resetsync import AsyncResetSynchronizer
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from migen.genlib.cdc import MultiReg
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from migen_axi.integration.soc_core import SoCCore
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from migen_axi.interconnect import axi, axi2csr
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from migen_axi.platforms import kasli_soc
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from misoc.interconnect import csr_bus
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from misoc.interconnect.csr import *
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from misoc.cores import virtual_leds
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@ -308,6 +310,14 @@ class GenericMaster(SoCCore):
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self.submodules.rtio_tsc = rtio.TSC(glbl_fine_ts_width=3)
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self.submodules.drtio_axi2csr = axi2csr.AXI2CSR(
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bus_csr=csr_bus.Interface(self.csr_data_width, self.csr_address_width),
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bus_axi=axi.Interface.like(self.ps7.m_axi_gp0))
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self.register_mem("drtio_csr", self.mem_map["axi"],
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4 * 2**(self.csr_address_width),
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self.drtio_axi2csr.bus)
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self.drtio_csr_group = []
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self.drtioaux_csr_group = []
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self.drtioaux_memory_group = []
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@ -332,9 +342,9 @@ class GenericMaster(SoCCore):
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self.csr_devices.append(coreaux_name)
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size = coreaux.get_mem_size()
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memory_address = self.axi2csr.register_port(coreaux.get_tx_port(), size)
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self.axi2csr.register_port(coreaux.get_rx_port(), size)
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self.add_memory_region(memory_name, self.mem_map["csr"] + memory_address, size * 2)
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memory_address = self.drtio_axi2csr.register_port(coreaux.get_tx_port(), size)
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self.drtio_axi2csr.register_port(coreaux.get_rx_port(), size)
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self.add_memory_region(memory_name, self.mem_map["axi"] + memory_address, size * 2)
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self.config["HAS_DRTIO"] = None
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self.config["HAS_DRTIO_ROUTING"] = None
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|
@ -333,6 +333,10 @@ pub enum Packet {
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destination: u8,
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},
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CoreMgmtFlashRequest {
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destination: u8,
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payload_length: u32,
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},
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CoreMgmtFlashAddDataRequest {
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destination: u8,
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last: bool,
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length: u16,
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@ -694,24 +698,28 @@ impl Packet {
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0xda => Packet::CoreMgmtAllocatorDebugRequest {
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destination: reader.read_u8()?,
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},
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0xdb => {
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0xdb => Packet::CoreMgmtFlashRequest {
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destination: reader.read_u8()?,
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payload_length: reader.read_u32()?,
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},
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0xdc => {
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let destination = reader.read_u8()?;
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let last = reader.read_bool()?;
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let length = reader.read_u16()?;
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let mut data: [u8; MASTER_PAYLOAD_MAX_SIZE] = [0; MASTER_PAYLOAD_MAX_SIZE];
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reader.read_exact(&mut data[0..length as usize])?;
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Packet::CoreMgmtFlashRequest {
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Packet::CoreMgmtFlashAddDataRequest {
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destination: destination,
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last: last,
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length: length,
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data: data,
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}
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||||
}
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0xdc => Packet::CoreMgmtDropLinkAck {
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0xdd => Packet::CoreMgmtDropLinkAck {
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destination: reader.read_u8()?,
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},
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0xdd => Packet::CoreMgmtDropLink,
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||||
0xde => {
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0xde => Packet::CoreMgmtDropLink,
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0xdf => {
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let last = reader.read_bool()?;
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let length = reader.read_u16()?;
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let mut data: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
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@ -722,7 +730,7 @@ impl Packet {
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data: data,
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}
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}
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0xdf => {
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0xe0 => {
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let last = reader.read_bool()?;
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let length = reader.read_u16()?;
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let mut value: [u8; SAT_PAYLOAD_MAX_SIZE] = [0; SAT_PAYLOAD_MAX_SIZE];
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@ -733,7 +741,7 @@ impl Packet {
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value: value,
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}
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}
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0xe0 => Packet::CoreMgmtReply {
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0xe1 => Packet::CoreMgmtReply {
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succeeded: reader.read_bool()?,
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},
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@ -1183,36 +1191,44 @@ impl Packet {
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writer.write_u8(destination)?;
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}
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Packet::CoreMgmtFlashRequest {
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destination,
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payload_length,
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} => {
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writer.write_u8(0xdb)?;
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writer.write_u8(destination)?;
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writer.write_u32(payload_length)?;
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}
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Packet::CoreMgmtFlashAddDataRequest {
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destination,
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last,
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length,
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data,
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} => {
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writer.write_u8(0xdb)?;
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writer.write_u8(0xdc)?;
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writer.write_u8(destination)?;
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writer.write_bool(last)?;
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writer.write_u16(length)?;
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writer.write_all(&data[..length as usize])?;
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}
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Packet::CoreMgmtDropLinkAck { destination } => {
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writer.write_u8(0xdc)?;
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writer.write_u8(0xdd)?;
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writer.write_u8(destination)?;
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}
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Packet::CoreMgmtDropLink => writer.write_u8(0xdd)?,
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Packet::CoreMgmtDropLink => writer.write_u8(0xde)?,
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Packet::CoreMgmtGetLogReply { last, length, data } => {
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writer.write_u8(0xde)?;
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writer.write_u8(0xdf)?;
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writer.write_bool(last)?;
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writer.write_u16(length)?;
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writer.write_all(&data[0..length as usize])?;
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}
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Packet::CoreMgmtConfigReadReply { last, length, value } => {
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writer.write_u8(0xdf)?;
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writer.write_u8(0xe0)?;
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writer.write_bool(last)?;
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writer.write_u16(length)?;
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writer.write_all(&value[0..length as usize])?;
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}
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Packet::CoreMgmtReply { succeeded } => {
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writer.write_u8(0xe0)?;
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writer.write_u8(0xe1)?;
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writer.write_bool(succeeded)?;
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}
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}
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@ -1252,7 +1268,8 @@ impl Packet {
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| Packet::SubkernelMessageAck { .. }
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| Packet::DmaPlaybackStatus { .. }
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| Packet::SubkernelFinished { .. }
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| Packet::CoreMgmtDropLinkAck { .. } => false,
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| Packet::CoreMgmtDropLinkAck { .. }
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| Packet::InjectionRequest { .. } => false,
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_ => true,
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}
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}
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|
@ -85,10 +85,7 @@ unsafe fn get_ttype_entry(
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encoding | DW_EH_PE_pcrel,
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ttype_base,
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)
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.map(|v| match v {
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||||
ttype_base => None,
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||||
ttype_entry => Some(ttype_entry as *const u8),
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})
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.map(|v| (v != ttype_base).then(|| v as *const u8))
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}
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pub unsafe fn find_eh_action(
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|
@ -788,7 +788,11 @@ pub fn main(timer: GlobalTimer, cfg: Config) {
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mgmt::start(
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cfg.clone(),
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restart_idle.clone(),
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Some(mgmt::DrtioTuple(aux_mutex.clone(), drtio_routing_table.clone(), timer)),
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Some(mgmt::DrtioContext(
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aux_mutex.clone(),
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drtio_routing_table.clone(),
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timer,
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)),
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);
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task::spawn(async move {
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|
@ -563,7 +563,6 @@ mod remote_coremgmt {
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linkno: u8,
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destination: u8,
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) -> Result<()> {
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info!("initited reboot request to satellite destination {}", destination);
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let reply = drtio::aux_transact(
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aux_mutex,
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linkno,
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@ -640,6 +639,32 @@ mod remote_coremgmt {
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) -> Result<()> {
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let mut image = &image[..];
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let alloc_reply = drtio::aux_transact(
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aux_mutex,
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linkno,
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routing_table,
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&Packet::CoreMgmtFlashRequest {
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destination: destination,
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payload_length: image.len() as u32,
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},
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timer,
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)
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.await;
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match alloc_reply {
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Ok(Packet::CoreMgmtReply { succeeded: true }) => Ok(()),
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Ok(packet) => {
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error!("received unexpected aux packet: {:?}", packet);
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write_i8(stream, Reply::Error as i8).await?;
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Err(drtio::Error::UnexpectedReply)
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||||
}
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||||
Err(e) => {
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||||
error!("aux packet error ({})", e);
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write_i8(stream, Reply::Error as i8).await?;
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Err(drtio::Error::AuxError)
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||||
}
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}?;
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while !image.is_empty() {
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||||
let mut data = [0; MASTER_PAYLOAD_MAX_SIZE];
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let len = image.read(&mut data).unwrap();
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@ -649,7 +674,7 @@ mod remote_coremgmt {
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||||
aux_mutex,
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linkno,
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routing_table,
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&Packet::CoreMgmtFlashRequest {
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&Packet::CoreMgmtFlashAddDataRequest {
|
||||
destination: destination,
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||||
last: last,
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length: len as u16,
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@ -856,10 +881,10 @@ mod local_coremgmt {
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||||
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||||
#[cfg(has_drtio)]
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||||
macro_rules! process {
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($stream: ident, $drtio_tuple:ident, $destination:expr, $func:ident $(, $param:expr)*) => {{
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($stream: ident, $drtio_context:ident, $destination:expr, $func:ident $(, $param:expr)*) => {{
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||||
if $destination == 0 {
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local_coremgmt::$func($stream, $($param, )*).await
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||||
} else if let Some(DrtioTuple(ref aux_mutex, ref routing_table, timer)) = $drtio_tuple {
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||||
} else if let Some(DrtioContext(ref aux_mutex, ref routing_table, timer)) = $drtio_context {
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||||
let routing_table = routing_table.borrow();
|
||||
let linkno = routing_table.0[$destination as usize][0] - 1 as u8;
|
||||
remote_coremgmt::$func($stream, &aux_mutex, &routing_table, timer, linkno, $destination, $($param, )*).await
|
||||
@ -873,20 +898,20 @@ macro_rules! process {
|
||||
|
||||
#[cfg(not(has_drtio))]
|
||||
macro_rules! process {
|
||||
($stream: ident, $drtio_tuple:ident, $destination:expr, $func:ident $(, $param:expr)*) => {{
|
||||
($stream: ident, $drtio_context:ident, $destination:expr, $func:ident $(, $param:expr)*) => {{
|
||||
local_coremgmt::$func($stream, $($param, )*).await
|
||||
}}
|
||||
}
|
||||
|
||||
#[derive(Clone)]
|
||||
pub struct DrtioTuple(pub Rc<Mutex<bool>>, pub Rc<RefCell<RoutingTable>>, pub GlobalTimer);
|
||||
pub struct DrtioContext(pub Rc<Mutex<bool>>, pub Rc<RefCell<RoutingTable>>, pub GlobalTimer);
|
||||
|
||||
async fn handle_connection(
|
||||
stream: &mut TcpStream,
|
||||
pull_id: Rc<RefCell<u32>>,
|
||||
cfg: Rc<Config>,
|
||||
restart_idle: Rc<Semaphore>,
|
||||
_drtio_tuple: Option<DrtioTuple>,
|
||||
_drtio_context: Option<DrtioContext>,
|
||||
) -> Result<()> {
|
||||
if !expect(&stream, b"ARTIQ management\n").await? {
|
||||
return Err(Error::UnexpectedPattern);
|
||||
@ -902,20 +927,20 @@ async fn handle_connection(
|
||||
}
|
||||
let msg: Request = FromPrimitive::from_i8(msg?).ok_or(Error::UnrecognizedPacket)?;
|
||||
match msg {
|
||||
Request::GetLog => process!(stream, _drtio_tuple, _destination, get_log),
|
||||
Request::ClearLog => process!(stream, _drtio_tuple, _destination, clear_log),
|
||||
Request::PullLog => process!(stream, _drtio_tuple, _destination, pull_log, &pull_id),
|
||||
Request::GetLog => process!(stream, _drtio_context, _destination, get_log),
|
||||
Request::ClearLog => process!(stream, _drtio_context, _destination, clear_log),
|
||||
Request::PullLog => process!(stream, _drtio_context, _destination, pull_log, &pull_id),
|
||||
Request::SetLogFilter => {
|
||||
let lvl = read_log_level_filter(stream).await?;
|
||||
process!(stream, _drtio_tuple, _destination, set_log_filter, lvl)
|
||||
process!(stream, _drtio_context, _destination, set_log_filter, lvl)
|
||||
}
|
||||
Request::SetUartLogFilter => {
|
||||
let lvl = read_log_level_filter(stream).await?;
|
||||
process!(stream, _drtio_tuple, _destination, set_uart_log_filter, lvl)
|
||||
process!(stream, _drtio_context, _destination, set_uart_log_filter, lvl)
|
||||
}
|
||||
Request::ConfigRead => {
|
||||
let key = read_key(stream).await?;
|
||||
process!(stream, _drtio_tuple, _destination, config_read, &cfg, &key)
|
||||
process!(stream, _drtio_context, _destination, config_read, &cfg, &key)
|
||||
}
|
||||
Request::ConfigWrite => {
|
||||
let key = read_key(stream).await?;
|
||||
@ -928,7 +953,7 @@ async fn handle_connection(
|
||||
read_chunk(stream, &mut buffer).await?;
|
||||
process!(
|
||||
stream,
|
||||
_drtio_tuple,
|
||||
_drtio_context,
|
||||
_destination,
|
||||
config_write,
|
||||
&cfg,
|
||||
@ -941,7 +966,7 @@ async fn handle_connection(
|
||||
let key = read_key(stream).await?;
|
||||
process!(
|
||||
stream,
|
||||
_drtio_tuple,
|
||||
_drtio_context,
|
||||
_destination,
|
||||
config_remove,
|
||||
&cfg,
|
||||
@ -950,13 +975,13 @@ async fn handle_connection(
|
||||
)
|
||||
}
|
||||
Request::Reboot => {
|
||||
process!(stream, _drtio_tuple, _destination, reboot)
|
||||
process!(stream, _drtio_context, _destination, reboot)
|
||||
}
|
||||
Request::ConfigErase => {
|
||||
process!(stream, _drtio_tuple, _destination, config_erase)
|
||||
process!(stream, _drtio_context, _destination, config_erase)
|
||||
}
|
||||
Request::DebugAllocator => {
|
||||
process!(stream, _drtio_tuple, _destination, debug_allocator)
|
||||
process!(stream, _drtio_context, _destination, debug_allocator)
|
||||
}
|
||||
Request::Flash => {
|
||||
let len = read_i32(stream).await?;
|
||||
@ -969,13 +994,13 @@ async fn handle_connection(
|
||||
buffer.set_len(len as usize);
|
||||
}
|
||||
read_chunk(stream, &mut buffer).await?;
|
||||
process!(stream, _drtio_tuple, _destination, image_write, &cfg, buffer)
|
||||
process!(stream, _drtio_context, _destination, image_write, &cfg, buffer)
|
||||
}
|
||||
}?;
|
||||
}
|
||||
}
|
||||
|
||||
pub fn start(cfg: Rc<Config>, restart_idle: Rc<Semaphore>, drtio_tuple: Option<DrtioTuple>) {
|
||||
pub fn start(cfg: Rc<Config>, restart_idle: Rc<Semaphore>, drtio_context: Option<DrtioContext>) {
|
||||
task::spawn(async move {
|
||||
let pull_id = Rc::new(RefCell::new(0u32));
|
||||
loop {
|
||||
@ -983,10 +1008,10 @@ pub fn start(cfg: Rc<Config>, restart_idle: Rc<Semaphore>, drtio_tuple: Option<D
|
||||
let pull_id = pull_id.clone();
|
||||
let cfg = cfg.clone();
|
||||
let restart_idle = restart_idle.clone();
|
||||
let drtio_tuple = drtio_tuple.clone();
|
||||
let drtio_context = drtio_context.clone();
|
||||
task::spawn(async move {
|
||||
info!("received connection");
|
||||
let _ = handle_connection(&mut stream, pull_id, cfg, restart_idle, drtio_tuple)
|
||||
let _ = handle_connection(&mut stream, pull_id, cfg, restart_idle, drtio_context)
|
||||
.await
|
||||
.map_err(|e| warn!("connection terminated: {:?}", e));
|
||||
let _ = stream.flush().await;
|
||||
|
@ -1281,6 +1281,24 @@ fn process_aux_packet(
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: false })
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtFlashRequest {
|
||||
destination: _destination,
|
||||
payload_length,
|
||||
} => {
|
||||
forward!(
|
||||
router,
|
||||
_routing_table,
|
||||
_destination,
|
||||
*rank,
|
||||
*self_destination,
|
||||
_repeaters,
|
||||
&packet,
|
||||
timer
|
||||
);
|
||||
|
||||
core_manager.allocate_image_buffer(payload_length as usize);
|
||||
drtioaux::send(0, &drtioaux::Packet::CoreMgmtReply { succeeded: true })
|
||||
}
|
||||
drtioaux::Packet::CoreMgmtFlashAddDataRequest {
|
||||
destination: _destination,
|
||||
last,
|
||||
length,
|
||||
|
@ -115,6 +115,10 @@ impl<'a> Manager<'_> {
|
||||
.map_err(|err| warn!("failed to erase: {:?}", err))
|
||||
}
|
||||
|
||||
pub fn allocate_image_buffer(&mut self, image_size: usize) {
|
||||
self.image_payload = Vec::with_capacity(image_size);
|
||||
}
|
||||
|
||||
pub fn add_image_data(&mut self, data: &[u8], data_len: usize) {
|
||||
self.image_payload.extend(&data[..data_len]);
|
||||
}
|
||||
|
Loading…
Reference in New Issue
Block a user