ae7ca22db9
dma: fix endianness issues
2020-07-16 17:27:08 +08:00
a9f725dd33
kernel: added error message after uncaught exception
2020-07-16 17:11:35 +08:00
caef2a9f84
runtime/panic: prevent nested panic and added core ID in panic msg.
2020-07-16 17:11:35 +08:00
16158acfa9
analyzer: close connection gracefully
2020-07-16 17:10:24 +08:00
10a12245a3
analyzer: fix endianness issue
2020-07-16 17:10:09 +08:00
84630d66e3
rpc: added #[repr(C)] for structs.
2020-07-16 15:48:17 +08:00
4457af7277
rpc: Fixed alignment problem.
...
Fixes issue #42 .
Previously there was no fix for the variable alignment.
We calculate the position of the variable based on the size
of the previous variable, so we could break the alignment requirement
for variables. For example, having a `i64` after `bool` could break
the alignment required for `i64` and trigger DataAbort or data
corruption.
However, this requires the same data layout and LLVM type for the
variables. If this cannot be maintained, this would break the alignment
on the other side of the RPC, either from host to kernel or kernel to
host.
2020-07-16 14:06:39 +08:00
2e10922715
analyzer: implement firmware part
2020-07-16 11:47:55 +08:00
b62fbce826
mgmt: log incoming connection
2020-07-16 11:36:26 +08:00
0c6db0d12c
analyzer: use 32-bit byte_count
2020-07-16 11:36:04 +08:00
36338ea3b2
Makefile: fix pl.rs dependencies
2020-07-16 11:35:40 +08:00
0b0ca8de49
analyzer: drive wid and wstrb
2020-07-15 23:11:19 +08:00
8e758ecc17
add RTIO analyzer core (untested)
2020-07-15 23:06:34 +08:00
b68cb137e5
dma: style
2020-07-15 23:06:14 +08:00
92405ffe91
logger: changed from RefCell to Mutex.
2020-07-15 17:04:16 +08:00
2568d62865
mgmt: fixed pull log
2020-07-15 16:05:00 +08:00
5149d37be9
szl: added cache flush and memory barriers.
...
Resolves #50 .
2020-07-14 17:02:42 +08:00
8e3574080c
core1: added cache flush and barriers.
2020-07-14 10:53:35 +08:00
49d93e20dd
dyld: add Image.rebind()
2020-07-14 01:31:54 +02:00
12ba867268
dma: fix and cleanup test
2020-07-13 18:58:08 +08:00
5c3c3c26b5
dma: fix inflight_cnt and eop generation
2020-07-13 18:51:55 +08:00
fa2d71615a
report async RTIO errors
2020-07-13 16:06:05 +08:00
b42ab0634b
complete RTIO exceptions
2020-07-13 15:47:34 +08:00
62f39e2c08
mgmt: Implemented network log access.
2020-07-13 15:15:06 +08:00
855b26aa19
Logger: ported log_buffer.
2020-07-13 14:59:56 +08:00
ea96cf96d3
dma: add simulation test (WIP)
2020-07-13 12:04:10 +08:00
f1f7fe8da6
fix gateware pure build
2020-07-13 10:44:25 +08:00
10888cc6c6
dma: remove unneeded import
2020-07-13 10:42:02 +08:00
a7073edf79
add DMA core (untested)
2020-07-13 10:37:17 +08:00
d79da19956
README: style
2020-07-11 19:02:37 +08:00
44e84cf7d4
README: typo/style
2020-07-11 19:01:45 +08:00
8085e7d646
README: document config
2020-07-11 19:00:19 +08:00
10643d878c
README: fix md syntax
2020-07-11 18:10:25 +08:00
76dd84e237
README: update
2020-07-11 18:08:49 +08:00
e3ff21b1b5
create gateware folder
2020-07-11 17:49:54 +08:00
7aec419ed6
kernel: added core1 instruction cache flush
2020-07-10 17:21:55 +08:00
68d27ca2ee
comms: removed core1 restart
2020-07-10 17:21:55 +08:00
407e18a6a0
fix typos
2020-07-10 16:36:45 +08:00
2d58193930
Panic: single line backtrace for addr2line.
2020-07-10 12:26:28 +08:00
c935e450df
makefile: automate runtime dependencies
2020-07-09 09:41:45 +08:00
656e768f06
makefile: update dependencies
2020-07-09 09:31:36 +08:00
2c1773b91b
kernel: refactor main_core1 into KernelImage
2020-07-08 23:49:43 +02:00
b3d4590eec
kernel: split into {api,control,core1,rpc}
2020-07-08 23:49:32 +02:00
68045ce0c5
mark RTIO clock as asychronous to system clock
2020-07-08 20:37:53 +08:00
7ee67db8e3
use IOSERDES TTL
2020-07-08 20:02:46 +08:00
bd7d58e239
add RTIO PLL and clock source selection
2020-07-08 19:58:13 +08:00
6454315cd2
config: refactor and share
2020-07-08 19:24:26 +08:00
e263814546
Kernel: Added startup kernel
2020-07-08 15:54:50 +08:00
67ff3c36e2
drop FSBL
...
All SZL and Zynq startup issues seem resolved.
2020-07-07 19:44:14 +08:00
a8de572014
set up PL clocks
2020-07-07 19:40:32 +08:00
