morgan
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morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

No need for DDS frequency, as shuttler also didn't include that

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

image.png

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

+-11V, https://github.com/sinara-hw/Phaser/issues/151

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

The clk_sel is implemented in coredevice and gateware

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

Maybe this is for DAC section?

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

A block diagram of the two variant should also be include.

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

it's better to use the ICs datasheet value instead of the stft paper spec table

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

it's better to omit Digital interpolation as it's implementation dependent

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

image.png

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

not MMCX it's U.FL connectors

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

I think we should also mention the U.FL connector in this paragraph. Since it's confusing to read 5 SMA connectors but 6 channels (2 ADC channels + 4 DAC channels) in bandband variant

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

It's better to mention Upconverter and Baseband topology separately,

morgan commented on pull request sinara-hw/datasheets#91 2025-04-22 12:40:19 +08:00
WIP: 4624: add Phaser

IMO, we should include the IQ mixer spec too and add notes about IQ mixer is only on upconverter config and DAC output for baseband config

morgan pushed to master at morgan/CoaXPress-SFP 2025-04-16 14:43:32 +08:00
14640aa4c6 SCH: update docs
ccdde95e3c PCB: re-route and update layers to SIG/GND/GND/SIG
6b2ac284bc PCB: change stack-up to match PCBWay
Compare 3 commits »
morgan pushed to master at sinara-hw/CoaXPress-SFP 2025-04-16 14:43:28 +08:00
14640aa4c6 SCH: update docs
ccdde95e3c PCB: re-route and update layers to SIG/GND/GND/SIG
6b2ac284bc PCB: change stack-up to match PCBWay
Compare 3 commits »
morgan pushed to master at sinara-hw/CoaXPress-SFP 2025-04-10 13:04:57 +08:00
8b9035e226 PCB: extend board to fit HDBNC outside of sfp-cage
morgan pushed to master at morgan/CoaXPress-SFP 2025-04-10 13:04:52 +08:00
8b9035e226 PCB: extend board to fit HDBNC outside of sfp-cage
morgan created branch master in sinara-hw/CoaXPress-SFP 2025-04-09 15:48:32 +08:00
morgan pushed to master at sinara-hw/CoaXPress-SFP 2025-04-09 15:48:32 +08:00
15d80d3ff6 add README
d69c8bca00 CXP-SFP: initial schematics, layout & jobset
d0c0b22e6a flake: init
d2cfe3105b git: add gitignore
morgan created repository sinara-hw/CoaXPress-SFP 2025-04-09 15:48:08 +08:00