1f8ef6bf96
cxp downconn: use auto aligner
0e69c5d5ba
cxp downconn: refactor bruteforce aligner
dbce74d831
cxp downconn: cleanup & use bruteforce aligner
2aef11143a
cxp downconn fw: doc clean up
77bff39212
cxp downconn fw: add manual alignment test
160fcc657a
cxp downconn: remove bruteforce aligner
bf1fd2d79b
cxp downconn: add manual alignment & rxrestart
452c3cee64
cxp downconn fw: add CXP datarate update printout
6c53447808
cxp downconn firmware: init
14aa81c8a2
cxp upconn firmware: init
82af01350f
cxp: add upconn, downconn & crc
1f033d605c
cxp upconn: add low speed serial
7d5e3c1ef9
cxp downconn: add high speed serial
stabilizer: expand serial IO instruction
250d759f05
mirny: fix wrong json template
adf516d310
Small fix
c45105e56b
fastino: add log2_width param
2e14232474
Add IP collision case
d71bc3a57e
update artiq-6 instructions
6efbbacf09
stabilizer: expand serial IO instruction
250d759f05
mirny: fix wrong json template
adf516d310
Small fix
c45105e56b
fastino: add log2_width param
2e14232474
Add IP collision case
6134ad5794
cxp upconn: refactor idle into its submodule
dbf7ac1cb9
cxp upconn : fix idle word lag behind tx_wordcount
8ba7793b24
cxp upconn: fix word count issue
481162430c
cxp upconn: add word & char boundary transmission
4eed5e99f4
cxp upconn: put encoder with tx_fifos
51b8111e79
flake: move to nixos 24.05
46dc25b89e
add LLVM copy from nixpkgs
731684abb4
flake: switch to nixpkgs master, update dependencies
195a21fe78
use nix format for arm gnu toolchain
96cefe6f06
update fsbl source
mirny: add build and flashing instructions
There are no mention of the file we need to add the line too "flake.nix", you can add it here e.g. "adding these line to flake.nix" or below
mirny: add build and flashing instructions
add an install path example like "/opt/Xilinx", since by default Xilinx install use "/tools/Xilinx" iirc
586fd2f17e
Gateware: remove redundant si549.py & wrpll.py
377f8779a0
kasli soc: refactor to use wrpll from artiq
1fbaacfc43
flake: update artiq
127ea9ea4d
flake: update dependencies
174c301d7d
add llvmPackages_11
WRPLL gatware: refactor
586fd2f17e
Gateware: remove redundant si549.py & wrpll.py
377f8779a0
kasli soc: refactor to use wrpll from artiq
1fbaacfc43
flake: update artiq
127ea9ea4d
flake: update dependencies
174c301d7d
add llvmPackages_11
Add assembly instructions for Shuttler
Use a number list and inline the code block "1.Initialize the Routing Tableartiq_route rt.bin init
"