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161 Commits

Author SHA1 Message Date
pca006132 e73ec731aa libboard_zynq/smoltcp: default without ipv6 support 
SZL netboot binary size too large with ipv6.
We can enable the ipv6 support in the runtime crate instead.
 2020-08-31 12:07:20 +08:00
Sebastien Bourdeauducq 273f9ea72b libboard_zynq/eth: fix comment 2020-08-24 21:47:10 +08:00
pca006132 671968bac3 libboard_zynq/eth: fixed tx lost packet 2020-08-24 15:51:01 +08:00
pca006132 bb09d25378 libboard_zynq/ethernet: ethernet fix and config 2020-08-21 13:34:02 +08:00
Astro b268fe015a stdio::drop_uart(): add delay 2020-08-17 19:38:41 +02:00
Harry Ho 1a96a7550a libboard_zynq: make RegisterBlock constructors more consistent 2020-08-13 14:49:26 +08:00
Harry Ho 36947104e3 libboard_zynq: make constructor names more consistent 2020-08-13 13:31:53 +08:00
Harry Ho 11089d8a64 i2c: delete dead code 2020-08-12 16:51:25 +08:00
Harry Ho 76a4cac873 i2c: disable its usage on Cora Z7-10 2020-08-10 14:24:13 +08:00
Harry Ho 4614ed1371 i2c: simplify ctor_common() 2020-08-08 10:06:11 +08:00
Harry Ho 16b2df91ca i2c: fix GPIO register mapping, I2C control & EEPROM write operations 2020-08-07 11:10:18 +08:00
Harry Ho f7d3135ec7 i2c: implement EEPROM operations; add CountDown waiting indication 2020-08-05 20:10:30 +08:00
Harry Ho c60230af25 i2c: implement basic i2c bitbanging 2020-08-05 17:35:33 +08:00
Sebastien Bourdeauducq a36a82d86d reduce ethernet verbosity 2020-08-04 22:15:01 +08:00
pca006132 2927c43309 libboard_zynq/gic: refactored and added SGI functions. 2020-08-03 12:35:17 +08:00
Astro 187801c4a7 gic: start implementation 2020-08-03 12:35:17 +08:00
pca006132 91ece367f2 libboard_zynq/mpcore: added generated register definitions 2020-08-03 12:35:17 +08:00
Astro 1f05e6977e eth::phy: replace ExtendedStatus with PSSR 2020-07-29 21:49:18 +02:00
Astro e408a8b22d eth::phy::extended_status: fix cap_1000base_x_full() bit position 2020-07-29 21:29:28 +02:00
Astro 27effb6257 eth::phy: s/Marvel/Marvell/ 2020-07-29 20:08:38 +02:00
Astro de5f605d60 eth: refactor peripheral instance into type parameter, improve clock setup 2020-07-29 19:45:01 +02:00
Astro ef4fb598fb ddr: improve dci divisors calculation 2020-07-28 00:43:33 +02:00
Astro f36b1a610e timer::global: wrap us in Microseconds, impl embedded_hal blocking delay traits 2020-07-22 23:41:15 +02:00
Astro 7f45d10af3 timer::global::CountDown: fix delaying from "up to" to "at least" the timespan 2020-07-22 22:43:10 +02:00
Astro 855d94c48e dmac: remove unused module 2020-07-20 19:42:32 +02:00
Sebastien Bourdeauducq f8785c3f07 fix some compilation warnings 2020-07-19 15:39:08 +08:00
Astro 484e385160 eth: implement DeviceCapabilities.max_burst_size 
this is a hint that /could/ boost TCP performance.
 2020-07-16 00:17:13 +02:00
Sebastien Bourdeauducq 371e59cef5 libboard_zynq: add fpgax_clk_ctrl registers 2020-07-07 19:37:51 +08:00
Astro e4e7141bf3 ddr: delint 2020-07-06 19:46:18 +02:00
Sebastien Bourdeauducq 0c60d684e4 slcr: remove soft reset 
Does not work and probably difficult to get to work.
 2020-07-06 13:06:10 +08:00
Sebastien Bourdeauducq 21c0c5cbc8 Revert "simplify ps7_init" 
What the simplified ps7_init does can now be reproduced by the DDRC driver.
On the other hand, we are still experiencing crazy Zynq instability issues, so keep the original ps7_init around for debugging.

This reverts commit 9fcf9243f2.
 2020-07-06 11:55:04 +08:00
pca006132 90904634cd DDR: fixed register write. 
Previously it writes `0x20066`, while the ps7_init set it to be
`0x200066`, notice the 1 more 0.
This should perform the same writes to the registers, so we do not have
to apply the ps7_init in artiq_zynq.
 2020-07-06 11:46:37 +08:00
Sebastien Bourdeauducq ae4d3e2455 smoltcp: enable IPv6 2020-07-06 11:30:48 +08:00
Sebastien Bourdeauducq 9fcf9243f2 simplify ps7_init 2020-07-06 00:52:40 +08:00
Astro f0697c3ec3 ddr: implement additional configuration 2020-07-03 02:20:10 +02:00
Astro b2c707d543 ddr: remove superfluous `_reg` from register names 2020-07-03 02:20:10 +02:00
Astro c0e66a632c ps7_init: move from experiments to libboard_zynq 2020-06-25 01:40:42 +02:00
Astro b33ccf83ba eth: doc 2020-06-18 18:07:50 +02:00
Astro a80a2c67ef eth: put desc list behind UncachedSlice, invalidate buffers, add barriers 2020-06-18 01:28:29 +02:00
pca006132 98f5099684 removed newline character 2020-06-16 17:36:01 +08:00
pca006132 2c3fa991ad implemented display trait for errors 2020-06-16 17:36:01 +08:00
pca006132 2c14a2a1a2
fixed global timer reset 2020-06-16 17:31:37 +08:00
pca006132 191da7c959
Added Copy trait for Milliseconds struct. 2020-06-16 14:56:29 +08:00
pca006132 d52466cacf
DevC driver refactored. 2020-06-16 14:55:53 +08:00
pca006132 a17a5d2925 sdcard: Changed some debug to trace. 2020-06-15 16:54:30 +08:00
pca006132 e0f26871db devc working! 2020-06-15 16:07:31 +08:00
Sebastien Bourdeauducq 82ec1ba7a7 sdio: better logging 2020-06-13 16:31:25 +08:00
pca006132 d3b488bfb3 standard capacity support 2020-06-11 10:21:01 +08:00
Astro 074b3547de sdio: fix unsound MaybeUninit usage 2020-06-11 10:07:19 +08:00
Astro 316ea61702 sdio: move ADMA2_DESCR32_TABLE into SdCard 2020-06-11 10:07:19 +08:00
Astro 1586190712 sdio: turn Adma2Desc32.attribute into a register! 2020-06-11 10:07:19 +08:00
Astro 32349e9dec sdio: convert Adma2Desc32 to VolatileCells, make ADMA2_DESCR32_TABLE: MaybeUninit 2020-06-11 10:07:19 +08:00
Astro b942cdcbc8 sdio: change Adma2Desc32 alignment from 1 to 4 
this should not break anything.
 2020-06-11 10:07:19 +08:00
Astro a1a211334f eth: always just allocate desc list + buffers 
buffers are allocated vec anyway. this removes the lifetime hack and
further prepares work on cache-line alignment to enable L1 writeback.
 2020-06-11 00:21:18 +02:00
pca006132 cf17a1c60a removed unneeded methods 2020-06-10 12:55:22 +08:00
pca006132 5332587de6 Changed mutability 2020-06-10 12:54:50 +08:00
pca006132 0ebc4a61c8 Modified SDIO to handle u8 buffer instead of u32. 2020-06-09 17:03:17 +08:00
pca006132 236592ae66 SDIO module completed 2020-06-05 12:27:12 +08:00
Astro 2c82fb793e Merge pull request 'sdio-registers' (#29) 2020-05-15 06:44:32 +08:00
Astro 0c48dd934e libboard_zynq: fix sclr::ddriob_ddr_ctrl vref_int_en 2020-05-10 22:14:55 +02:00
Astro 3841accd9c libboard_zynq: fix ddr memtest range 2020-05-09 02:53:58 +02:00
Astro 3e02980c20 libboard_zynq: fix access to "full" 1022 MB on target_zc706 2020-05-09 02:35:39 +02:00
pca 73b0ec9837 fixed typo 2020-05-06 13:58:46 +08:00
pca 4acee21c05 Merge branch 'master' of git.m-labs.hk:M-Labs/zc706 into sdio-registers 2020-05-06 11:06:38 +08:00
Sebastien Bourdeauducq ce844f1b02 devc: add is_done() 2020-05-04 22:16:53 +08:00
Astro c955eaae7f libboard_zynq: flush Uart by waiting for tx idle 2020-05-02 23:32:01 +02:00
Astro 0f666c570c libboard_zynq: remove unneeded Uart flush 2020-05-02 23:30:45 +02:00
pca 244ccdeac2 finished register definitions 2020-05-01 15:38:07 +08:00
Sebastien Bourdeauducq e047c2900b ddr: log clock info with debug level 2020-05-01 12:27:43 +08:00
Astro 877f2c34bd libboard_zynq: use log logging 2020-05-01 01:46:42 +02:00
Astro 619ebf147c libsupport_zynq: move mod logger to libboard_zynq 2020-05-01 01:33:40 +02:00
Astro 0d4d021b1b clean up 2020-05-01 01:17:53 +02:00
pca d9e8a667bd some macro changes and more registers 2020-04-29 21:19:24 +08:00
pca b22cc4e2b6 various control registers 2020-04-29 09:34:17 +08:00
pca 3238dae99f started writing register definitions 2020-04-28 23:00:47 +08:00
Astro aa93794632 libboard_zynq: add GlobalTimer::get_us(), use in libsupport_zynq::logger 2020-04-25 03:01:19 +02:00
Astro fe6a058a6b libboard_zynq: find prescaler for GlobalTimer, rename new() to start() 2020-04-25 02:59:48 +02:00
Astro 88a2a2bc71 libasync, libboard_zynq: add block_async glue, make GlobalTimer sharable 2020-04-25 01:18:49 +02:00
Astro 8012573a8f libboard_zynq: impl embedded_hal CountDown for GlobalTimer 2020-04-25 00:44:32 +02:00
Astro 4ab6fb6271 libboard_zynq: use Void in uart embedded_hal impl 2020-04-25 00:28:17 +02:00
Astro f835192c0a libboard_zynq: add GlobalTimer implementation 2020-04-25 00:18:45 +02:00
Astro 04c47b9bdb libboard_zynq: impl embedded_hal serial write traits for Uart 2020-04-24 21:31:37 +02:00
Astro f8782f3f69 libboard_zynq: let println!() write no '\r' 2020-04-20 23:44:16 +02:00
Astro 4b346f5c55 libboard_zynq: fix flash manual_mode chip_index 2020-04-10 20:41:16 +02:00
Astro 2dda3ca4e6 libboard_zynq: delint 2020-04-10 20:41:16 +02:00
Astro c3ebafa6ed libboard_zynq: fix flash read 2020-04-06 22:41:49 +02:00
Astro 8a98cef3fc libboard_zynq: fix some hw setup 2020-04-03 00:17:25 +02:00
Astro 46af38906e libboard_zynq: wrap eth Buffer for alignment 2020-03-29 00:08:43 +01:00
Astro ed52ead914 cora ddr attempts 2020-03-28 21:50:06 +01:00
Astro ab75be80ba update smoltcp to 0.6.0 2020-03-25 22:24:01 +01:00
Astro 319f7d9eef move smoltcp dependency to libboard_zynq only 2020-03-25 22:23:30 +01:00
Astro a0c95c3b3e remove superfluous dependencies 2020-03-25 21:54:29 +01:00
Astro 97e7605804 update dependency r0 2020-03-25 21:52:23 +01:00
Astro 000741d05a update rust-nightly + linked_list_allocator 2020-03-25 21:47:51 +01:00
Astro 29bf29a037 add some fpga regs 2020-03-25 13:02:01 +01:00
Astro 03da85dcea libboard_zynq::dmac: enable mod, add channel_regs() 2020-02-03 23:04:26 +01:00
Astro d7e8ba297b libboard_zynq::dmac: unify equal registers 2020-02-03 22:11:44 +01:00
Astro f9cb2e7cb0 delint 2020-01-30 23:18:14 +01:00
Astro aae85981e2 libboard_zynq::clocks: setup clock sources and cpu clock 2020-01-23 23:15:10 +01:00
Astro 77f440db33 libboard_zynq::stdio: add drop_uart() 
drops locks and causes reinitialization which is needed for exceptions
and clock canges.
 2020-01-23 23:14:50 +01:00