forked from M-Labs/zynq-rs
mpidr: wrap with proper bitfield getters
Prevents callers from dealing with CORE_MASK.
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@ -91,8 +91,19 @@ pub struct HVBAR;
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def_reg_r!(HVBAR, u32, "mrc p15, 4, $0, c12, c0, 0");
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def_reg_w!(HVBAR, u32, "mcr p15, 4, $0, c12, c0, 0");
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/// Multiprocess Affinity Register
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pub struct MPIDR;
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def_reg_r!(MPIDR, u32, "mrc p15, 0, $0, c0, c0, 5");
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def_reg_r!(MPIDR, mpidr::Read, "mrc p15, 0, $0, c0, c0, 5");
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wrap_reg!(mpidr);
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register_bits!(mpidr,
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/// CPU core index
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cpu_id, u8, 0, 1);
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register_bits!(mpidr,
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/// Processor index in "multi-socket" systems
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cluster_id, u8, 8, 11);
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register_bit!(mpidr,
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/// true if part of uniprocessor system
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u, 30);
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pub struct DFAR;
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def_reg_r!(DFAR, u32, "mrc p15, 0, $0, c6, c0, 0");
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@ -35,8 +35,7 @@ pub unsafe extern "C" fn PrefetchAbort() {
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pub unsafe extern "C" fn DataAbort() {
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stdio::drop_uart();
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const CORE_MASK: u32 = 0x3;
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println!("DataAbort on core {}", MPIDR.read() & CORE_MASK);
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println!("DataAbort on core {}", MPIDR.read().cpu_id());
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println!("DFSR: {:03X}", DFSR.read());
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loop {}
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@ -22,9 +22,7 @@ static mut CORE1_ENABLED: VolatileCell<bool> = VolatileCell::new(false);
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#[no_mangle]
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#[naked]
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pub unsafe extern "C" fn Reset() -> ! {
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const CORE_MASK: u32 = 0x3;
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match MPIDR.read() & CORE_MASK {
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match MPIDR.read().cpu_id() {
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0 => {
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SP.write(&mut __stack0_start as *mut _ as u32);
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boot_core0();
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