12: Add some S-Mode CSRs r=dvc94ch a=wangrunji0408
Add these S-Mode CSRs:
- `sstatus`
- `stvec`
- `sie`
- `sip`
- `scause`
- `stval`
- `sscratch`
- `sepc`
- `satp`
as well as:
- `time`
- `timeh`
and S-Mode instructions:
- `sfence.vma`
Most of the code have been tested in the [RustOS](https://github.com/wangrunji0408/RustOS) project.
14: Remove ecall and *ret instructions from riscv::asm r=dvc94ch a=Disasm
* *ret instructions should not be used directly in Rust code, they should be used in handlers, written in asm ([example](273f0d4f70/src/lib.rs (L294-L340))).
* ecall instruction should be wrapped into something like syscall(), which should be declared in another platform-specific crate.
Co-authored-by: WangRunji <wangrunji0408@163.com>
Co-authored-by: Vadim Kaushan <admin@disasm.info>
10: these raw instructions are unsafe r=dvc94ch a=strake
`wfi` is safe, but the rest are not. Let's make them all unsafe until we have a better idea — the return types are wrong anyhow.
Co-authored-by: M Farkas-Dyck <strake888@gmail.com>
In the original riscv-rust fork the target arch was simply named
"riscv", but RISC-V support landed in Rust with "riscv32" as the arch
name instead.
Include "riscv64" optimistically for future-proofing.
Vadim Kaushan
bors[bot]
WangRunji
M Farkas-Dyck
David Craven
Dan Callaghan
Jakob Weisblat